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Fix PSL check for valid fifo in data during write, fixes #750#766

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eine merged 1 commit into
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tmeissner:fix_array_axi_vcs_fifo_psl
Oct 24, 2021
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Fix PSL check for valid fifo in data during write, fixes #750#766
eine merged 1 commit into
VUnit:masterfrom
tmeissner:fix_array_axi_vcs_fifo_psl

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@tmeissner

@tmeissner tmeissner commented Oct 23, 2021

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As @JimLewis reported in #750 the result of the test if data is unknown during a FIFO write is not what we want in all cases. I fixed that by using the reduction or in combination with the to_x01() function. That's also better readable code IMHO.

@JimLewis

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Any reason you did not just use:

assert always (not rst and wr -> is_x( d)@rising_edge(clkw)

@tmeissner

tmeissner commented Oct 24, 2021

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The reason was that I didn't remember that is_x() exists 😉 I will update the PR.

@tmeissner tmeissner force-pushed the fix_array_axi_vcs_fifo_psl branch from 35a8986 to 481cfb3 Compare October 24, 2021 08:41
@eine eine merged commit da8eb0a into VUnit:master Oct 24, 2021
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eine commented Oct 24, 2021

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Thanks! Jim for reporting and Torsten for fixing! ❤️

@eine eine added this to the v4.6.0 milestone Oct 24, 2021
@tmeissner tmeissner deleted the fix_array_axi_vcs_fifo_psl branch October 25, 2021 06:13
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3 participants