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transformer: vfmt
1 parent 26ed1f7 commit 4dbcba6

2 files changed

Lines changed: 8 additions & 7 deletions

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‎vlib/v2/gen/arm64/arm64.v‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5199,6 +5199,7 @@ fn (mut g Gen) try_emit_simple_scalar_store(instr_idx int) bool {
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4 { g.emit(asm_str_w(Reg(val_reg), Reg(ptr_reg))) }
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else { g.emit(asm_str(Reg(val_reg), Reg(ptr_reg))) }
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}
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return true
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}
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‎vlib/v2/transformer/flat_write.v‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3834,13 +3834,13 @@ pub fn (mut t Transformer) transform_stmt_to_flat(stmt ast.Stmt, mut out ast.Fla
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}
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match stmt {
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ast.AsmStmt, ast.Directive, ast.EmptyStmt, ast.EnumDecl, ast.FlowControlStmt,
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ast.ImportStmt, ast.InterfaceDecl, ast.ModuleStmt, ast.TypeDecl {
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return out.emit_stmt(stmt)
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}
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ast.StructDecl {
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return out.emit_stmt(t.transform_struct_decl(stmt))
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}
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ast.ConstDecl {
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ast.ImportStmt, ast.InterfaceDecl, ast.ModuleStmt, ast.TypeDecl {
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return out.emit_stmt(stmt)
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}
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ast.StructDecl {
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return out.emit_stmt(t.transform_struct_decl(stmt))
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}
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ast.ConstDecl {
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// Mirror transform_const_decl: transform each field's value via
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// transform_expr_to_flat, keep name + is_public unchanged, and emit
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// the flat encoding directly. The intermediate `ast.ConstDecl` /

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