We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent ae5bf7e commit 8123728Copy full SHA for 8123728
2 files changed
vlib/v/gen/c/infix.v
@@ -164,7 +164,8 @@ fn (mut g Gen) infix_expr_eq_op(node ast.InfixExpr) {
164
g.styp(left.unaliased.set_nr_muls(0))
165
}
166
mut is_builtin_or_alias_to_builtin := left.sym.is_builtin()
167
- if !is_builtin_or_alias_to_builtin && left.sym.info is ast.Alias {
+ if !has_alias_eq_op_overload && !is_builtin_or_alias_to_builtin
168
+ && left.sym.info is ast.Alias {
169
alias_info := left.sym.info as ast.Alias
170
parent_sym := g.table.sym(alias_info.parent_type)
171
is_builtin_or_alias_to_builtin = parent_sym.is_builtin()
vlib/v/tests/aliases/alias_eq_op_test.v
@@ -0,0 +1,10 @@
1
+type MyInt = int
2
+
3
+fn (i1 MyInt) == (i2 MyInt) bool {
4
+ return int(i1) == int(i2)
5
+}
6
7
+fn test_main() {
8
+ c := MyInt(3) == MyInt(1)
9
+ assert c == false
10
0 commit comments