Hardware–software co-design for efficient machine learning on constrained devices, from the instruction set up to deployed AI systems.
AI Integration Specialist · MS Electrical Engineering, Alabama A&M University · Albuquerque, NM
Website · Google Scholar · LinkedIn · ORCID
- Computer architecture and FPGA acceleration. Softcore processors for the MIPS and SOMA/SORA instruction sets, from single-cycle to pipelined; streaming vision accelerators on Zynq-7000; analytical DDR bandwidth-feasibility models.
- Multimodal ML for computational pathology. Survival prediction from whole-slide images and transcriptomics that holds up when a modality is missing, with audits of how existing fusion models actually use each input (five TCGA cohorts).
- Low-resource speech. TTS and ASR pipelines for low-resource languages.
- Multi-agent robotics. Decentralized multi-drone coordination.
- Hybrid Multi-Modal Learning for Extreme Long-Tail Fungi Classification. S. Sharif, I. Egbunu, Y. Fu, Z. Xiao. ACM Southeast Conference (ACMSE), 2026. doi
- Hardware-Accelerated Video Processing System for Low-Powered Embedded Devices. S. Sharif, S. Kondamadugula, Z. Xiao, A. Scott. IEEE World AI IoT Congress (AIIoT), 2025. doi
- Hardware-Software Co-Designed Embedded System for Efficient Image Processing. S. Sharif, S. Kondamadugula, Z. Xiao, A. Scott. IEEE World AI IoT Congress (AIIoT), 2025. doi
- Design and Implementation of 32-bit MIPS-based Softcore Processor with Enhanced Instruction Set on FPGA. S. Sharif, S. Kondamadugula, P. Jungwirth, Z. Xiao, A. Scott. IEEE Computing and Communication Workshop and Conference (CCWC), 2025. Best Presentation Award. doi
- Optimization and Implementation of a 32-bit MIPS-based Softcore Processor to Run Statistical Algorithms on FPGA. S. Sharif, M. Simbule, T. Cabbil, S. Kondamadugula, Z. Xiao, A. Scott. ICT for Intelligent Systems (ICTIS), Springer SIST, 2024. doi
Under review:
- Auditing Input Use in Histology–Transcriptomics Survival Models, with a One-Checkpoint Recipe for Missing Inputs. S. Sharif, H. Can. Interdisciplinary Sciences: Computational Life Sciences.
- Orthographic Convention, Pseudo-Labels and the Limits of System Combination in Code-Switched Indonesian–Javanese ASR. S. Sharif, N. O’Neill. TACL.
- SOMA/SORA: A Symmetric Overloaded Instruction Set Architecture Family with FPGA Softcore Implementation and Pipelined Optimization. S. Sharif, S. Kondamadugula, Z. Xiao, P. Jungwirth. IEEE Access.
- A Bandwidth-Feasibility Model and Runtime-Programmable 3×3 Convolution Engine for Streaming Video on Zynq-7000 SoCs. S. Sharif, S. Kondamadugula, Z. Xiao. IEEE TCAS-II.
| Repository | |
|---|---|
| conv3x3-engine-zynq | Runtime-programmable 3×3 convolution engine and fixed Sobel core for Zynq-7020: RTL, self-checking testbenches, fixed-point golden model, post-route Vivado reports. |
Merged fixes upstream in python/typeshed (pywin32 and docker stubs), mahmoodlab/TRIDENT (whole-slide image processing), crewAIInc/crewAI (SQLite connection leaks, UTF-8 handling in the CLI) and openclaw/openclaw.


