A blog by John Wickerson
This blog post is about Ollie Cosgrove’s paper (with Ally Donaldson and me) that will be presented at the 34th International Symposium on FPGAs in February. Over the last few years, I've enjoyed being a part of several projects that have been giving hardware design tools a hard time; that is: developing techniques for uncovering… Continue reading Finding bugs in FPGA place-and-route tools
My area of academia runs mainly on conferences, as opposed to journals. This means that a few times each year, hundreds of researchers simultaneously submit papers about their latest and greatest project, and a "program committee" decides which of those get to appear in the proceedings of the upcoming conference. There is usually considerable overlap… Continue reading Are conference reviewers harsher when they have a submission of their own?
Ilan Iwumbwe and Benny Liu did undergraduate research placements with me this summer, and I'm very pleased that they will be presenting their work at the Programming Languages for Quantum Computing (PLanQC) workshop at POPL next month. Ilan and Benny built a tool called QuteFuzz that randomly generates descriptions of quantum circuits. The idea is… Continue reading Fuzzing Quantum Compilers
I wrote earlier this year about my attempt to understand the repercussions of toggling $latex \subseteq$ and $latex \supseteq$ when giving a semantics to Hoare triples. In response to that post, Yann Herklotz helpfully pointed me to Patrick Cousot's POPL 2024 paper [10], which does all this and a lot more besides. In particular, Cousot's… Continue reading The Hoare Cube
The UK government imposes a tax on people's income, and, as is quite conventional, the rate at which a person pays this tax increases as their income increases. However, I was surprised to notice recently that this rate does not increase monotonically with income. Here is how the UK government explains the calculation of income… Continue reading Fun with income tax
This post provides a short introduction to a paper that will be presented at DVCon in Munich next month by my PhD student Michalis Pardalos about work we have done with collaborators Alastair Donaldson, Emi Morini and Laura Pozzi. Hardware engineers take great care to ensure that their designs are correct. Unlike bugs in software,… Continue reading Who checks the equivalence checkers?
I'm delighted that Quentin Corradi, a PhD student I jointly supervise with George Constantinides, will be presenting his work to improve the reliability of hardware design tools next week at the FUZZING'24 workshop, a satellite event of the ISSTA conference. The Verilog language is widely used in hardware design, and is accepted by a multitude… Continue reading Automated feature testing of Verilog parsers using fuzzing
I was singing Freddy, My Love as a lullaby for my toddler last night, and enjoying the nifty rhyming triplets (catches–patches–matches, and so on), when I suddenly realised that the song has almost twice as many rhymes as I had previously thought! The last three lines of each verse not only rhyme at their ends,… Continue reading In praise of Freddy, My Love
I'm delighted that Luke Geeson’s work on "mix testing" (a collaboration with James Brotherston, Wilco Dijkstra, Alastair Donaldson, Lee Smith, Tyler Sorensen, and myself) will appear at OOPSLA 2024 in October. There has been quite a lot of work on "litmus testing" of compilers in the last couple of decades. This mainly takes the form of… Continue reading Mix-testing: revealing a new class of compiler bugs
I've used Santander Cycles to get from King's Cross to Imperial College hundreds of times over the last couple of years, and I'd like to think that I'm pretty close to finding the fastest possible route now. The basic route is to aim for New Cavendish Street and then cross Hyde Park, but I've found… Continue reading Cycling from King’s Cross to Imperial College London
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