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The existing device uses the schematic shown below. I find it unusual that the EN pin is pulled to OUT. In this design, however, the EN pin is mechanically grounded elsewhere in the circuit.

schematic

What I see on an oscilloscope when input USB5V is applied is more surprising:

oscilloscope

Sorry for the Russian text in the image. The trace of interest is on CH2 (Blue, 0.5 V/div) with a timebase of 5 ms/div. The signal on CH1 (Yellow) is not relevant here.

Here we see stable oscillations of 5V at approximately 0.8V with a period of 10ms. I assume the UP7534 power switch has failed, as no 5V loads were connected during this measurement.

My question is what physical principles could explain this beautiful oscillatory behavior?

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    \$\begingroup\$ Where are the capacitors in the input and the output? Do not expect predictable operation if you have omitted them or they are somewhere far away behind long wires. I'm sure the datasheet tells it. It should also give circuit layout guidance. \$\endgroup\$ Commented 22 hours ago

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My question is what physical principles could explain this beautiful oscillatory behavior?

Maybe it's not a coincidence that the enable pin threshold is about 0.8 volts as per this graph from the data sheet: -

enter image description here

So, I am speculating that although you think the enable pin is grounded elsewhere in the wider circuit, you are mistaken and maybe there's a capacitor on that pin to ground. Hence, with your enable pin being inverting (\$\overline{EN}\$) for your specific device (the uP7534D) the circuit would oscillate around a DC level of 0.8 volts between the hysteresis thresholds (red and blue in the graph above) with a p-p level of around 100 mV: -

enter image description here

It oscillates because of the pull-up resistor to the output, the inverting nature of your specific device's enable-pin and, some extra capacitance to ground on that enable pin. This forms a standard comparator-based hysteretic relaxation oscillator.

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