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@syntacore

Syntacore

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  1. scr1 scr1 Public

    SCR1 is a high-quality open-source RISC-V MCU core in Verilog

    SystemVerilog 1k 349

  2. scr1-sdk scr1-sdk Public

    open-source SDKs for the SCR1 core

    C 81 37

Repositories

Showing 10 of 42 repositories
  • snippy Public

    llvm-snippy instruction sequence generator

    syntacore/snippy's past year of commit activity
    LLVM 91 17 9 (1 issue needs help) 4 Updated Sep 8, 2026
  • openocd Public Forked from openocd-org/openocd

    OpenOCD Syntacore targets

    syntacore/openocd's past year of commit activity
    C 8 1,059 0 2 Updated Aug 26, 2026
  • dining-philosophers Public Forked from aka-sps/dining-philosophers

    Simple c++11 demo of "Dining philosophers problem"

    syntacore/dining-philosophers's past year of commit activity
    C++ 0 2 0 0 Updated Aug 3, 2026
  • zephyr Public Forked from zephyrproject-rtos/zephyr

    Primary GIT Repository for the Zephyr Project

    syntacore/zephyr's past year of commit activity
    C 1 Apache-2.0 10,088 0 0 Updated May 29, 2026
  • sc-buildroot Public
    syntacore/sc-buildroot's past year of commit activity
    Makefile 0 0 0 0 Updated Apr 30, 2026
  • linux Public
    syntacore/linux's past year of commit activity
    C 3 1 0 0 Updated Apr 30, 2026
  • miniboot Public

    Syntacore RISC-V Minimal First Stage Bootloader

    syntacore/miniboot's past year of commit activity
    C 0 Apache-2.0 1 0 0 Updated Apr 30, 2026
  • u-boot Public
    syntacore/u-boot's past year of commit activity
    C 0 0 0 0 Updated Apr 30, 2026
  • opensbi Public
    syntacore/opensbi's past year of commit activity
    C 1 2 0 0 Updated Apr 23, 2026
  • sc-bl Public

    Syntacore first stage bootloader

    syntacore/sc-bl's past year of commit activity
    C 11 11 0 3 Updated Jan 19, 2026
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