Enable POWER9 fp32 and fp16 SIMD code #366
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ggerganov
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Jan 3, 2023
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| #define GGML_F32x4_REDUCE(sumf, sum) \ | ||
| sum[0] = vec_add(sum[0], sum[1]); \ | ||
| sum[2] = vec_add(sum[2], sum[3]); \ | ||
| sum[4] = vec_add(sum[4], sum[5]); \ | ||
| sum[6] = vec_add(sum[6], sum[7]); \ | ||
| sum[0] = vec_add(sum[0], sum[2]); \ | ||
| sum[4] = vec_add(sum[4], sum[6]); \ | ||
| sum[0] = vec_add(sum[0], sum[4]); \ | ||
| sumf = vec_extract(sum[0], 0) + vec_extract(sum[0], 1) \ | ||
| + vec_extract(sum[0], 2) + vec_extract(sum[0], 3); |
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Is there a reason to use this version instead of the for-based version?
The advantage of the latter is that it will work for GGML_F32_ARR == 1, 2, 4, 8, 16, while doing it like this it will only work for GGML_F32_ARR == 8
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I'll try reverting that and compare speed. Also, I think I can get rid of the load/store argument changes, but it'll take some more work. And the F32 implementation seems to still use some F16 operations, so I'll investigate that. I'll make a new pull request for all this later. For now I'll close this one. |
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With the FP32 base model and this patch set, the jfk example takes about 3.2 seconds to transcribe. This is another data point for #300, and it is about one second faster than the current FP16 SIMD code.