The Reconfigurable Computer Architectures group within the EAS group, Institute of Technical Informatics, Graz University of Technology explores the design, implementation and tooling of next-generation, flexible computing systems – from RISC-V cores and FPGAs to operating systems and EDA flows. Our research is highly collaborative and open, with strong ties to both academia and industry. If you are interested in joint projects, student exchanges, or technology transfer, please contact us.
Fields of Interest (non-exhaustive)
- RISC-V architectures and ecosystem (in general)
- Design, analysis and optimization of RISC-V cores and SoCs
- RISC-V extensions: custom instructions, protection, enclaves and trusted execution
- FPGA architectures & dynamic partial reconfiguration (DPR)
- FPGA-based system design and architecture exploration
- Dynamic partial reconfiguration for adaptive accelerators and in-field updates
- Run-time reconfiguration strategies for reliability, isolation and resource sharing
- Reconfigurable RISC-V SoCs & eFPGA architectures
- RISC-V SoCs with tightly-coupled eFPGAs and custom accelerators
- Dynamic / partial reconfiguration and instruction-set extensions for microcontrollers
- Novel hardware description languages (HDLs)
- Design and evaluation of procedural HDLs that raise abstraction while preserving low-level control
- Exploration of novel programming language concepts for hardware description (e.g., procedural)
- Embedded operating systems, AUTOSAR & formal methods
- Real-time OS architectures for safety-critical embedded and automotive systems
- Formal specification, verification and analysis of OS services and synchronization primitives
- Generative & automated HW/SW design flows
- Automated PCB and hardware generation from software / system models
- Co-synthesis of embedded hardware and software from high-level descriptions
- Sustainable & measurable embedded systems
- Architectures and OS concepts for long-lived, updateable embedded platforms
- Measurement and monitoring of performance and power in SoCs and MCUs
- Open FPGA / EDA flows & fabric generation
- Open-source flows for FPGA fabrics and ASIC integration
- Design space exploration for eFPGA fabrics in mixed-signal processes
- AI-assisted architecture & verification support
- RAG/LLM-based microarchitecture knowledge bases and specification mining
- AI-supported analysis, documentation and debugging for HW/OS stacks
- Embedded automotive systems & smart mobility
- Platform and OS concepts for connected, update-capable ECUs
- Migration of legacy automotive software to modern RISC-V / reconfigurable platforms
- Computer Engineering education & OER
- RISC-V / FPGA-based teaching labs and puzzle-style processor design courses
- Open Educational Resources and automated testing/feedback for programming and HW design
