July 26-29, 2026

DAC 2026

Program Live
April 17, 2026

Long Beach, CA | July 26-29, 2026

Become an Exhibitor

DAC, The Chips to Systems Conference, is the premier conference for chip-to-system innovation. Connect with elite engineers and executives shaping the future of semiconductor design and automation software. Secure your spot today.

Awards Nominations

DAC 2026: The Chips to Systems Conference is now accepting nominations for:

  • Under-40 Innovators Award
  • Most Influential Paper Award
  • Marie R. Pistilli Women in Electronic Design Achievement Award

Submissions are due April 6, 2026.

Learn more and submit a nomination in the Awards section.

DAC 2026 Call for Late Breaking Results

Late Breaking Results (LBR) Papers

Prospective authors are invited to submit a Late Breaking Results (LBR) paper. LBR papers should cover new research in any area relevant to the normal paper submission for DAC.

Sufficient work must have been completed to indicate viability of the work, but by their nature LBR papers typically outline new and exciting results. Papers must use the template provided on the DAC web site.

DAC 2026 Young Fellows Program

Be part of an unforgettable experience at DAC 2026

Be part of an unforgettable experience at the 2026 DAC, Chips to Systems Conference in Long Beach, California!

Keynotes

John Martinis

CTO & Co-Founder Qolab and 2025 Nobel Laureate in Physics

Keynote Speaker

John Martinis is a distinguished physicist and 2025 Nobel Laureate in Physics, renowned for his pioneering contributions to superconducting quantum computing. His research has been central to developing high-fidelity qubits and engineering the architectures needed for scalable quantum processors. He previously led Google’s quantum hardware team, where his group achieved the landmark 2019 quantum supremacy experiment — the first demonstration of a quantum computer outperforming the world’s most powerful classical supercomputer on a computational task. In 2022, he co-founded Qolab, where he now serves as CTO and continues to advance next-generation superconducting qubit technology and quantum system design.

Dr. Baaziz Achour

EVP and Chief Technology Officer, Qualcomm Technologies, Inc.

Dr. Baaziz Achour serves as Executive Vice President and Chief Technology Officer of Qualcomm Technologies, Inc. In this role he is responsible for global research and development activities associated with all technologies in QCT, Qualcomm’s semiconductor business, as well as overseeing the execution of enterprise-wide technical and product roadmaps across all business areas.

Dr. Achour first joined Qualcomm as a Systems Engineer in 1993. Over the course of his tenure with Qualcomm, he has held several leadership roles within the engineering organization and has helped drive the expansion of Qualcomm’s leadership in critical technology areas as the company has diversified. Dr. Achour has been essential in contributing to nearly every generation of technology and was a key part of the leadership team that enabled the accelerated launch of 5G.

Dr. Achour holds a B.S. degree in Physics from the University of Algiers, and master’s and doctorate degrees in Electrical Engineering from Tufts University. He has twenty-four granted U.S. patents in the area of communications.

Jan M. Rabaey

Professor Emeritus at University of California at Berkeley

Jan Rabaey is Professor Emeritus in the EECS Department the University of California at Berkeley, after being the holder of the Donald O. Pederson Distinguished Professorship at the same institute for over 30 years. He is a founding director of the Berkeley Wireless Research Center (BWRC), the Berkeley Ubiquitous SwarmLab, and the SIA-DARPA GSRC Center. He served as the Electrical Engineering Division Chair at Berkeley twice. From 2019 until 2025, he also served as the CTO of the System-Technology Co-Optimization (STCO) Division of IMEC, Belgium.

Prof. Rabaey has made high-impact contributions to a number of fields, including low power integrated circuits, advanced wireless systems, mobile devices, sensor networks, and ubiquitous computing.  Some of the systems he helped envision include the infoPad (a forerunner of the iPad), PicoNets and PicoRadios, the Swarm, Brain-Machine interfaces and the Human Intranet. 

He is the primary author of the influential “Digital Integrated Circuits: A Design Perspective” textbook that has served to educate hundreds of thousands of students all over the world. He is the recipient of numerous awards, amongst others the 2009 EDAA Lifetime Achievement Award. Most recently, he received the 2025 IEEE James H. Mulligan Jr Education Medal,  the 2025 IEEE CASS John Choma Education Award, and the IEEE 2026 Donald O. Pederson Solid State Circuits Award. He is a Life Fellow of the IEEE, and has been involved in a broad variety of start-up ventures.

SKYTalks

Timothy Costa

General Manager (GM), Industrial and Computational Engineering, NVIDIA

Dr. Timothy Costa is ​the General Manager (GM) for Industrial and Computational Engineering at NVIDIA, where he spearheads the strategic development and implementation of solutions for these critical industries.

Tim holds a Doctor of Philosophy (Ph.D.) in Mathematics, focusing on numerical methods for modeling fluids and semiconductors.

At NVIDIA, Tim has held several leadership positions. Currently, he leads the Semiconductor, Industrial Engineering and Quantum verticals, as well as the CUDA-X product line. Previously, he was Director of HPC Software and Quantum, where he built the NVIDIA Quantum platform, managed the CUDA libraries product line, and launched the NVIDIA HPC SDK. He has played a key role in shaping NVIDIA's scientific computing offerings and driving innovation in the Quantum Computing industry.

As General Manager (GM), Industrial and Computational Engineering, Tim's focuses on leveraging NVIDIA's accelerated computing technology and AI solutions to address the complex challenges faced by industrial and semiconductor customers.

Lalitha Immaneni

Vice President, Semiconductor Research & Development, APTM, Intel

Lalitha Immaneni is a Vice President of Semiconductor Research & Development in the Assembly Test Technology Development organization for Intel Corporation. Lalitha manages a world class and diverse team of packaging architects, designers, and specialized engineers in the “Advanced Design & Customer Enabling” group, spanning multiple geographies (USA, Malaysia, and India).  She leads the Back end technical interface to Intel’s foundry customers.

Lalitha is responsible for developing substrate/silicon, assembly, and board design rules, designing essential building blocks for emerging packaging technologies, developing electrical and physical design methodologies for packaging as well as delivering product package architectures, supporting product electrical analysis, and executing product designs for Intel Foundry.   She is also responsible for the thermal, mechanical, and electrical analysis of Intel’s packaging choices and the implications across the product envelopes while also delivering industry leading power delivery and HSIO solutions.

Lalitha owns the vision and execution of a centralized package and board flows/tools as well as enabling the EDA ecosystem readiness for Intel’s packaging and board design needs.

Lalitha is a global leader and role model with a 30-year track record of stellar technical achievement in the semiconductor packaging industry.  Her technical accomplishments include leading Intel through multiple transitions in the package design tools towards better efficiency and quality. Widely recognized within the packaging EDA partner community, Lalitha is known for driving design tool capabilities for die disaggregation.  She has led many “firsts,” including enabling the definition of the first industry EDA packaging tool and leading package co-design for the first Foveros and EMIB products. She recently led the Package Assembly Design Kit delivery for Intel foundry Services and is currently focused on EDA ecosystem enablement, interoperable formats, and standards for chiplets.

Lalitha volunteers extensively as a coach and mentor for Positive Paths, a non-profit organization serving women in Phoenix.   She is a co-chair for the Intel Network of Executive Women (iNEW). She is a renowned mentor and coach to countless engineers within and outside Intel

Dr. Huiming Bu

Vice President, Global Semiconductors R&D and Albany Operations, IBM Research

Huiming Bu is vice president of IBM Global Semiconductors R&D and Albany Operation. He has 20+ years of professional experience in semiconductor technology R&D at IBM after he received his Ph.D. in Electrical Engineering from Yale University. Huiming started his technical career at IBM on High-κ/Metal Gate project and then led SOI FinFET research for IBM’s 14nm node technology. After that, Huiming and his team delivered 10nm/7nm technology nodes and are now focusing on 2nm/1.4nm development. Huiming also leads Pathfinding R&D to enable the path to 7A technology and beyond for IBM and its Joint Development Alliance (JDA) partners. In his current role, Huiming is responsible for global IBM Semiconductors R&D strategy across world-wide labs. He oversees R&D activities in advanced logic, chiplet and advanced packaging, emerging memory and analog AI hardware. In addition to driving semiconductor technology R&D agenda, Huiming is also responsible for IBM Research Albany site and fab operations. Huiming has authored/co-authored 100+ technical publications and holds 100+ patents in semiconductor area.

Artour Levin

Corporate Vice President, AI Silicon Engineering, Microsoft

Artour Levin is a seasoned technology leader and expert in semiconductor design and engineering with over 30 years of industry experience. He currently serves as Corporate Vice President of AI Silicon Engineering at Microsoft Corporation, where he leads the company’s in-house team focused on defining and building advanced silicon AI acceleration technologies — custom hardware designed to power next-generation artificial intelligence workloads.

Before joining Microsoft, Artour spent a significant portion of his career at Intel. There, he held wide range of leadership positions in developing Products and IPs across various markets including Client, Data Center, Graphics and Accelerating Computing This long tenure gave him broad expertise in chip design, development processes, and silicon innovation. 

Artour's background combines deep technical knowledge in semiconductor design, system-level architecture, and AI hardware acceleration. His work focuses on creating efficient, high-performance silicon solutions at a time when AI and machine learning are reshaping demands on computing hardware.

Animashree Anandkumar

Bren Professor of Computing and Mathematical Sciences

TechTalks

Amit Gupta

Siemens DISW, Senior VP, EDA AI and Custom IC

Amit Gupta is Senior Vice President and General Manager of the Solido Custom IC and Central AI divisions at Siemens EDA. He leads the strategic growth and development of Solido's AI-powered solutions for variation-aware custom IC design, simulation, library characterization, and IP validation, as well as the Fuse EDA AI system.

In 2005, Gupta founded Solido Design Automation and served as President and CEO. The company became the leading supplier of AI-based software, helping top semiconductor companies reduce electronic chip failures due to manufacturing variation, while improving performance and profitability. Siemens acquired Solido in 2017.

Gupta has served on the boards of Solido, Analog Design, Clevor Technologies, and Electronic System Design Alliance. He is Executive in Residence at the University of Saskatchewan.

Gupta graduated with degrees in both Electrical Engineering and Computer Science with Great Distinction from the University of Saskatchewan. He was awarded the best engineering design project award, and outstanding alumni award for significant accomplishments since graduation.

Jeffrey Z. Pan

Co-Founder and CTO

William Wang

CEO and Founder of ChipAgents.ai

William Wang is the CEO and Founder of ChipAgents.ai, the category leading agentic AI platform for advancing agent-based AI approaches for semiconductor workflows. He is also the Mellichamp Endowed Chair Professor of AI and Designs at UC Santa Barbara, and a global leader in fundamental AI research. He founded the UCSB Center for Responsible Machine Learning, the Mind and Machine Intelligence Initiative, and the UCSB NLP Group. His honors include the IEEE SPS Pierre-Simon Laplace Award, NSF CAREER Award, BCS Karen Sparck Jones Award, DARPA Young Faculty Award, and IEEE AI’s 10 to Watch.

Analyst Reviews

Jay Vleeschhouwer

Managing Director at Griffin Securities

Dylan Patel

Founder, CEO, and Chief Analyst, SemiAnalysis

Conference Venue

Long Beach Convention Center

The Long Beach Convention Center will serve as a dynamic venue for DAC 2026: The Chips to Systems Conference. Set along the scenic Southern California coastline, the center offers modern meeting spaces and a vibrant setting that reflects the innovative spirit of DAC. Its central location in downtown Long Beach provides easy access to hotels, dining, and entertainment, making it an ideal hub for bringing together industry leaders, researchers, and practitioners to explore the future of design automation from chips to systems.

About DAC

Special Thanks

Conference Supporters

We proudly recognize the supporters whose contributions elevate this year’s conference.

Industry Partners

Platinum

ChipAgents

Industry Partners Platinum

About us

We are reinventing semiconductor design and verification through advanced AI agent techniques. Alpha Design AI is pioneering an AI-native approach to Electronic Design Automation (EDA), transforming how chips are designed and verified. Our flagship product, ChipAgents, aims to boost RTL design and verification productivity by 10x, driving innovation across industries with smarter, more efficient chip design.

Expertise

Our team is the cornerstone of our success. Comprised of world-leading AI and semiconductor experts, we bring together deep knowledge and diverse experience in both AI and semiconductor design. This collective expertise empowers us to push the boundaries of what's possible, developing cutting-edge solutions that meet the evolving demands of the chip design and verification landscape.

Our Approach

We believe the future of chip design lies in the seamless integration of AI and semiconductor technologies. By harnessing the power of AI agents, we develop tools that enhance the productivity of hardware engineers, allowing for faster, smarter, and more scalable designs. Through continuous innovation, we anticipate the future needs of our clients, enabling them to stay ahead of the curve in a competitive industry.

Our values

Our core value is an unwavering focus on our customers, prioritizing their needs and exceeding their expectations at every step. Relentless innovation and a commitment to excellence are at the heart of everything we do. We are driven by the belief that agentic AI and semiconductor technologies can shape the future, improving not just the efficiency of chip design but also making a lasting impact on the world. We are committed to enhancing the quality of life through transformative technology.

Siemens

Industry Partners Platinum

Siemens is the technology company for transforming industry, infrastructure and transportation.  The expertise underpinning our technologies—electrification, automation, software, and digital twin—is helping customers be more productive, profitable, and sustainable.

Silver

Cadence logo.

Cadence

Industry Partners Silver

Cadence delivers tools, software, IP, and high-end services that help companies design and verify chips, packages, boards, and entire systems. Real Behavioral Modeling. Automated Workflows. Extensive Coverage. Comprehensive Platform. Customizable Tools.

Ricursive

Industry Partners Silver

Ricursive Intelligence is a frontier AI lab focused on building self-improving systems, starting with chip design. We are reinventing chip development and closing the loop between AI and the hardware that fuels it, recursively accelerating the path to artificial superintelligence.

We are the team behind AlphaChip (Nature 2021), RL-CCD (DAC Best Paper 2023), Insta (DAC Best Paper 2025), C3PO (ASP-DAC Best Paper 2026), with hands-on experience developing Gemini, Claude, and TPUs. Our team members come from Google DeepMind, Anthropic, NVIDIA, Cadence, Apple, Stanford, MIT, Harvard, and other top institutions.

Backed by $335M from Sequoia, Lightspeed, DST, and NVentures, we are scaling a small, elite team to solve the most important bottlenecks in AI and chip design. Join us at https://www.ricursive.com/careers

Bronze

Conference

Technical Conference