mips32: require LLVM ABI to be explicitly set, but also allow n32

Author: RalfJung

compiler/rustc_codegen_ssa/src/back/metadata.rs

@@ -294,18 +294,13 @@ pub(super) fn elf_e_flags(architecture: Architecture, sess: &Session) -> u32 {
                 _ => elf::EF_MIPS_ARCH_64R2,
             };
 
-            // If the ABI is explicitly given, use it, or default to O32 on 32-bit MIPS,
-            // which is the only "true" 32-bit option that LLVM supports.
+            // Use the explicitly given ABI.
             match sess.target.options.llvm_abiname.as_ref() {
                 "o32" if is_32bit => e_flags |= elf::EF_MIPS_ABI_O32,
                 "n32" if !is_32bit => e_flags |= elf::EF_MIPS_ABI2,
                 "n64" if !is_32bit => {}
-                "" if is_32bit => e_flags |= elf::EF_MIPS_ABI_O32,
-                "" => sess.dcx().fatal("LLVM ABI must be specified for 64-bit MIPS targets"),
-                s if is_32bit => {
-                    sess.dcx().fatal(format!("invalid LLVM ABI `{}` for 32-bit MIPS target", s))
-                }
-                s => sess.dcx().fatal(format!("invalid LLVM ABI `{}` for 64-bit MIPS target", s)),
+                // The rest is invalid (which is already ensured by the target spec check).
+                s => bug!("invalid LLVM ABI `{}` for MIPS target", s),
             };
 
             if sess.target.options.relocation_model != RelocModel::Static {

compiler/rustc_target/src/spec/mod.rs

@@ -3402,14 +3402,15 @@ impl Target {
                     self.abi,
                 );
             }
-            Arch::Mips => {
+            Arch::Mips | Arch::Mips32r6 => {
                 check!(self.llvm_floatabi.is_none(), "`llvm_floatabi` is unused on MIPS");
                 check!(self.rustc_abi.is_none(), "`rustc_abi` is unused on MIPS");
                 check_matches!(
                     (&*self.llvm_abiname, &self.abi),
-                    // FIXME: we should force it to always be non-empty.
+                    // No in-tree targets use "n32" but at least for now we let out-of-tree targets
+                    // experiment with that.
                     ("o32", Abi::Unspecified | Abi::Other(_))
-                        | ("", Abi::Unspecified | Abi::Other(_)),
+                        | ("n32", Abi::Unspecified | Abi::Other(_)),
                     "invalid MIPS ABI name and `cfg(target_abi)` combination:\n\
                      ABI name: {}\n\
                      cfg(target_abi): {}",

compiler/rustc_target/src/spec/targets/mips_mti_none_elf.rs

@@ -24,6 +24,7 @@ pub(crate) fn target() -> Target {
             endian: Endian::Big,
             cpu: "mips32r2".into(),
 
+            llvm_abiname: "o32".into(),
             max_atomic_width: Some(32),
 
             features: "+mips32r2,+soft-float,+noabicalls".into(),

compiler/rustc_target/src/spec/targets/mips_unknown_linux_gnu.rs

@@ -18,6 +18,7 @@ pub(crate) fn target() -> Target {
             endian: Endian::Big,
             cpu: "mips32r2".into(),
             features: "+mips32r2,+fpxx,+nooddspreg".into(),
+            llvm_abiname: "o32".into(),
             max_atomic_width: Some(32),
             mcount: "_mcount".into(),
 

compiler/rustc_target/src/spec/targets/mips_unknown_linux_musl.rs

@@ -18,6 +18,11 @@ pub(crate) fn target() -> Target {
         pointer_width: 32,
         data_layout: "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(),
         arch: Arch::Mips,
-        options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base },
+        options: TargetOptions {
+            endian: Endian::Big,
+            llvm_abiname: "o32".into(),
+            mcount: "_mcount".into(),
+            ..base
+        },
     }
 }

compiler/rustc_target/src/spec/targets/mips_unknown_linux_uclibc.rs

@@ -18,6 +18,7 @@ pub(crate) fn target() -> Target {
             endian: Endian::Big,
             cpu: "mips32r2".into(),
             features: "+mips32r2,+soft-float".into(),
+            llvm_abiname: "o32".into(),
             max_atomic_width: Some(32),
             mcount: "_mcount".into(),
 

compiler/rustc_target/src/spec/targets/mipsel_mti_none_elf.rs

@@ -24,6 +24,7 @@ pub(crate) fn target() -> Target {
             endian: Endian::Little,
             cpu: "mips32r2".into(),
 
+            llvm_abiname: "o32".into(),
             max_atomic_width: Some(32),
 
             features: "+mips32r2,+soft-float,+noabicalls".into(),

compiler/rustc_target/src/spec/targets/mipsel_sony_psp.rs

@@ -36,6 +36,7 @@ pub(crate) fn target() -> Target {
 
             // PSP does not support trap-on-condition instructions.
             llvm_args: cvs!["-mno-check-zero-division"],
+            llvm_abiname: "o32".into(),
             pre_link_args,
             link_script: Some(LINKER_SCRIPT.into()),
             ..Default::default()

compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_gnu.rs

@@ -16,6 +16,7 @@ pub(crate) fn target() -> Target {
         options: TargetOptions {
             cpu: "mips32r2".into(),
             features: "+mips32r2,+fpxx,+nooddspreg".into(),
+            llvm_abiname: "o32".into(),
             max_atomic_width: Some(32),
             mcount: "_mcount".into(),
 

compiler/rustc_target/src/spec/targets/mipsel_unknown_linux_musl.rs

@@ -16,6 +16,6 @@ pub(crate) fn target() -> Target {
         pointer_width: 32,
         data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(),
         arch: Arch::Mips,
-        options: TargetOptions { mcount: "_mcount".into(), ..base },
+        options: TargetOptions { llvm_abiname: "o32".into(), mcount: "_mcount".into(), ..base },
     }
 }