So, when Intel designed the 8086 that originated the x86 instruction set, they based it on earlier processor designs featuring a 16-bit address space (64 kB). However, as RAM had become cheaper and thus the market for CPUs capable of addressing more memory had been increasing, they decided to extend its address space to 20 bits (1 MB).

They did this by adding 16-bit segment registers (CS, DS, ES and SS; FS and GS came later) which could then be combined with a 16-bit offset to generate the resulting 20-bit linear address. This worked by shifting the segment value 4 bits to the right left and adding the 16-bit offset. So 0013:0042h is equal to (0013h << 4) + 0042h = 00130h + 0042h = 00172h. But, important for our story here, 0014:0032h has the same 20-bit linear address 00172h.

Thus: every 16 bytes a new segment begins.

Edit: note that this is all about real mode x86. In protected mode (on the 80286 and later) segments are indexes in a descriptor table, and in paged mode (on the 80386 and later) the virtual memory backing the segments can be in arbitrary locations in physical memory.