/* This file is automatically generated. */
#ifndef CYCFG_PPC_H
#define CYCFG_PPC_H

#define CYCFG_PPC_SECURED_PERI0_MAIN 0U
#define CYCFG_PPC_SECURED_PERI0_GR0_GROUP 1U
#define CYCFG_PPC_SECURED_PERI0_GR1_GROUP 0U
#define CYCFG_PPC_SECURED_PERI0_GR2_GROUP 0U
#define CYCFG_PPC_SECURED_PERI0_GR3_GROUP 0U
#define CYCFG_PPC_SECURED_PERI0_GR4_GROUP 0U
#define CYCFG_PPC_SECURED_PERI0_GR5_GROUP 0U
#define CYCFG_PPC_SECURED_PERI0_GR0_BOOT 1U
#define CYCFG_PPC_SECURED_PERI0_GR1_BOOT 1U
#define CYCFG_PPC_SECURED_PERI0_GR2_BOOT 1U
#define CYCFG_PPC_SECURED_PERI0_GR3_BOOT 1U
#define CYCFG_PPC_SECURED_PERI0_GR4_BOOT 1U
#define CYCFG_PPC_SECURED_PERI0_GR5_BOOT 1U
#define CYCFG_PPC_SECURED_PERI0_TR 0U
#define CYCFG_PPC_SECURED_PPC0_PPC_PPC_SECURE 1U
#define CYCFG_PPC_SECURED_PPC0_PPC_PPC_NONSECURE 1U
#define CYCFG_PPC_SECURED_PERI_PCLK0_MAIN 0U
#define CYCFG_PPC_SECURED_RRAMC0_RRAM_EXTRA_AREA_RRAMC_PROTECTED 1U
#define CYCFG_PPC_SECURED_RRAMC0_RRAM_EXTRA_AREA_RRAMC_GENERAL 0U
#define CYCFG_PPC_SECURED_RRAMC0_RRAM_EXTRA_AREA_RRAMC_REPAIR 1U
#define CYCFG_PPC_SECURED_RRAMC0_RRAM_EXTRA_AREA_RRAMC_EXTRA 1U
#define CYCFG_PPC_SECURED_RRAMC0_RRAMC0_RRAMC_USER 0U
#define CYCFG_PPC_SECURED_RRAMC0_RRAMC0_RRAMC_ALLUSER 0U
#define CYCFG_PPC_SECURED_RRAMC0_RRAMC0_RRAMC_M0SEC 1U
#define CYCFG_PPC_SECURED_RRAMC0_MPC0_PPC_MPC_MAIN 1U
#define CYCFG_PPC_SECURED_RRAMC0_MPC1_PPC_MPC_MAIN 1U
#define CYCFG_PPC_SECURED_RRAMC0_MPC0_PPC_MPC_PC 1U
#define CYCFG_PPC_SECURED_RRAMC0_MPC1_PPC_MPC_PC 1U
#define CYCFG_PPC_SECURED_RRAMC0_MPC0_PPC_MPC_ROT 1U
#define CYCFG_PPC_SECURED_RRAMC0_MPC1_PPC_MPC_ROT 1U
#define CYCFG_PPC_SECURED_RRAMC0_RRAM_SFR_RRAMC_SFR_USER 0U
#define CYCFG_PPC_SECURED_RRAMC0_RRAM_SFR_RRAMC_SFR_FPGA 1U
#define CYCFG_PPC_SECURED_RRAMC0_RRAM_SFR_RRAMC_SFR_NONUSER 1U
#define CYCFG_PPC_SECURED_M33SYSCPUSS 0U
#define CYCFG_PPC_SECURED_PASS 0U
#define CYCFG_PPC_SECURED_RAMC0_CM33 0U
#define CYCFG_PPC_SECURED_RAMC1_CM33 0U
#define CYCFG_PPC_SECURED_RAMC0_BOOT 1U
#define CYCFG_PPC_SECURED_RAMC1_BOOT 1U
#define CYCFG_PPC_SECURED_RAMC0_RAM_PWR 0U
#define CYCFG_PPC_SECURED_RAMC1_RAM_PWR 0U
#define CYCFG_PPC_SECURED_RAMC0_MPC0_PPC_MPC_MAIN 0U
#define CYCFG_PPC_SECURED_RAMC1_MPC0_PPC_MPC_MAIN 0U
#define CYCFG_PPC_SECURED_RAMC0_MPC0_PPC_MPC_PC 0U
#define CYCFG_PPC_SECURED_RAMC1_MPC0_PPC_MPC_PC 0U
#define CYCFG_PPC_SECURED_RAMC0_MPC0_PPC_MPC_ROT 0U
#define CYCFG_PPC_SECURED_RAMC1_MPC0_PPC_MPC_ROT 0U
#define CYCFG_PPC_SECURED_MXCM33_CM33 0U
#define CYCFG_PPC_SECURED_MXCM33_CM33_S 0U
#define CYCFG_PPC_SECURED_MXCM33_CM33_NS 0U
#define CYCFG_PPC_SECURED_MXCM33_BOOT_PC0 1U
#define CYCFG_PPC_SECURED_MXCM33_BOOT_PC1 1U
#define CYCFG_PPC_SECURED_MXCM33_BOOT_PC2 0U
#define CYCFG_PPC_SECURED_MXCM33_BOOT_PC3 1U
#define CYCFG_PPC_SECURED_MXCM33_BOOT 1U
#define CYCFG_PPC_SECURED_MXCM33_CM33_INT 0U
#define CYCFG_PPC_SECURED_DW0_DW 0U
#define CYCFG_PPC_SECURED_DW1_DW 0U
#define CYCFG_PPC_SECURED_DW0_DW_CRC 0U
#define CYCFG_PPC_SECURED_DW1_DW_CRC 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT0_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT1_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT2_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT3_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT4_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT5_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT6_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT7_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT8_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT9_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT10_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT11_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT12_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT13_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT14_CH 0U
#define CYCFG_PPC_SECURED_DW0_CH_STRUCT15_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT0_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT1_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT2_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT3_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT4_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT5_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT6_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT7_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT8_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT9_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT10_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT11_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT12_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT13_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT14_CH 0U
#define CYCFG_PPC_SECURED_DW1_CH_STRUCT15_CH 0U
#define CYCFG_PPC_SECURED_CPUSS_ALL_PC 0U
#define CYCFG_PPC_SECURED_CPUSS_DDFT 0U
#define CYCFG_PPC_SECURED_CPUSS_CM33_S 0U
#define CYCFG_PPC_SECURED_CPUSS_CM33_NS 0U
#define CYCFG_PPC_SECURED_CPUSS_MSC_INT 0U
#define CYCFG_PPC_SECURED_CPUSS_AP 1U
#define CYCFG_PPC_SECURED_CPUSS_BOOT 0U
#define CYCFG_PPC_SECURED_MS0_MAIN 1U
#define CYCFG_PPC_SECURED_MS4_MAIN 1U
#define CYCFG_PPC_SECURED_MS5_MAIN 1U
#define CYCFG_PPC_SECURED_MS6_MAIN 1U
#define CYCFG_PPC_SECURED_MS7_MAIN 1U
#define CYCFG_PPC_SECURED_MS8_MAIN 1U
#define CYCFG_PPC_SECURED_MS9_MAIN 1U
#define CYCFG_PPC_SECURED_MS10_MAIN 1U
#define CYCFG_PPC_SECURED_MS11_MAIN 1U
#define CYCFG_PPC_SECURED_MS29_MAIN 1U
#define CYCFG_PPC_SECURED_MS31_MAIN 1U
#define CYCFG_PPC_SECURED_MS_PC0_PRIV 0U
#define CYCFG_PPC_SECURED_MS_PC6_PRIV 0U
#define CYCFG_PPC_SECURED_MS_PC9_PRIV 0U
#define CYCFG_PPC_SECURED_MS_PC11_PRIV 0U
#define CYCFG_PPC_SECURED_MS_PC31_PRIV 1U
#define CYCFG_PPC_SECURED_MS_PC0_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_PC6_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_PC9_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_PC11_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_PC31_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MSC_ACG 0U
#define CYCFG_PPC_SECURED_CPUSS_SL_CTL_GROUP 1U
#define CYCFG_PPC_SECURED_IPC0_STRUCT0_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT1_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT2_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT3_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT4_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT5_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT6_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT7_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT8_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT9_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT10_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT11_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT12_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT13_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT14_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_STRUCT15_IPC 0U
#define CYCFG_PPC_SECURED_IPC0_INTR_STRUCT0_INTR 0U
#define CYCFG_PPC_SECURED_IPC0_INTR_STRUCT1_INTR 0U
#define CYCFG_PPC_SECURED_IPC0_INTR_STRUCT2_INTR 0U
#define CYCFG_PPC_SECURED_IPC0_INTR_STRUCT3_INTR 0U
#define CYCFG_PPC_SECURED_IPC0_INTR_STRUCT4_INTR 0U
#define CYCFG_PPC_SECURED_IPC0_INTR_STRUCT5_INTR 0U
#define CYCFG_PPC_SECURED_IPC0_INTR_STRUCT6_INTR 0U
#define CYCFG_PPC_SECURED_IPC0_INTR_STRUCT7_INTR 0U
#define CYCFG_PPC_SECURED_FAULT_STRUCT0_MAIN 0U
#define CYCFG_PPC_SECURED_FAULT_STRUCT1_MAIN 0U
#define CYCFG_PPC_SECURED_SRSS_GENERAL 0U
#define CYCFG_PPC_SECURED_SRSS_GENERAL2 0U
#define CYCFG_PPC_SECURED_SRSS_HIB_DATA 0U
#define CYCFG_PPC_SECURED_SRSS_SECURE2 1U
#define CYCFG_PPC_SECURED_SRSS_MAIN 0U
#define CYCFG_PPC_SECURED_SRSS_SECURE 1U
#define CYCFG_PPC_SECURED_RAM_TRIM_SRSS_SRAM 0U
#define CYCFG_PPC_SECURED_SRSS_WDT 0U
#define CYCFG_PPC_SECURED_SRSS_MCWDTA 0U
#define CYCFG_PPC_SECURED_PWRMODE_PWRMODE 0U
#define CYCFG_PPC_SECURED_RTC_BACKUP 0U
#define CYCFG_PPC_SECURED_RTC_B_BREG0 0U
#define CYCFG_PPC_SECURED_RTC_B_BREG1 0U
#define CYCFG_PPC_SECURED_RTC_B_BREG2 0U
#define CYCFG_PPC_SECURED_DEBUG600_DEBUG600 0U
#define CYCFG_PPC_SECURED_M0SECCPUSS_STATUS_MAIN 1U
#define CYCFG_PPC_SECURED_M0SECCPUSS_STATUS_PC1 1U
#define CYCFG_PPC_SECURED_CRYPTO_MAIN 0U
#define CYCFG_PPC_SECURED_CRYPTO_CRYPTO 0U
#define CYCFG_PPC_SECURED_CRYPTO_BOOT 0U
#define CYCFG_PPC_SECURED_CRYPTO_KEY0 0U
#define CYCFG_PPC_SECURED_CRYPTO_KEY1 0U
#define CYCFG_PPC_SECURED_CRYPTO_BUF 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT0_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT1_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT2_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT3_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT4_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT5_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT6_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT7_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT8_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT9_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT10_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT11_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT12_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT13_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT14_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT15_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT16_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT17_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT18_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT19_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT20_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_PRT21_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT0_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT1_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT2_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT3_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT4_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT5_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT6_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT7_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT8_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT9_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT10_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT11_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT12_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT13_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT14_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT15_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT16_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT17_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT18_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT19_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT20_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_SECURE_PRT21_SECURE_PRT 0U
#define CYCFG_PPC_SECURED_HSIOM_AMUX 0U
#define CYCFG_PPC_SECURED_HSIOM_MON 0U
#define CYCFG_PPC_SECURED_GPIO_PRT0_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT1_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT2_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT3_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT4_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT5_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT6_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT7_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT8_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT9_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT10_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT11_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT12_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT13_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT14_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT15_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT16_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT17_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT18_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT19_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT20_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT21_PRT 0U
#define CYCFG_PPC_SECURED_GPIO_PRT0_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT1_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT2_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT3_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT4_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT5_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT6_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT7_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT8_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT9_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT10_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT11_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT12_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT13_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT14_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT15_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT16_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT17_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT18_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT19_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT20_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_PRT21_CFG 0U
#define CYCFG_PPC_SECURED_GPIO_SEC_GPIO 0U
#define CYCFG_PPC_SECURED_GPIO_GPIO 0U
#define CYCFG_PPC_SECURED_GPIO_TEST 0U
#define CYCFG_PPC_SECURED_SMARTIO_PRT11_PRT 0U
#define CYCFG_PPC_SECURED_SMARTIO_PRT17_PRT 0U
#define CYCFG_PPC_SECURED_CANFD0_CH0_CH 0U
#define CYCFG_PPC_SECURED_CANFD0_CH1_CH 0U
#define CYCFG_PPC_SECURED_CANFD0_MAIN 0U
#define CYCFG_PPC_SECURED_CANFD0_BUF 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP0_CNT0_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP0_CNT1_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP0_CNT2_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP0_CNT3_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP0_CNT4_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP0_CNT5_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP0_CNT6_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP0_CNT7_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT0_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT1_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT2_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT3_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT4_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT5_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT6_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT7_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT8_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT9_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT10_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT11_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT12_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT13_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT14_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT15_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT16_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT17_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT18_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT19_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT20_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT21_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT22_CNT 0U
#define CYCFG_PPC_SECURED_TCPWM0_GRP1_CNT23_CNT 0U
#define CYCFG_PPC_SECURED_LPCOMP 0U
#define CYCFG_PPC_SECURED_SCB0 0U
#define CYCFG_PPC_SECURED_SCB2 0U
#define CYCFG_PPC_SECURED_SCB3 0U
#define CYCFG_PPC_SECURED_SCB4 0U
#define CYCFG_PPC_SECURED_SCB5 0U
#define CYCFG_PPC_SECURED_SCB6 0U
#define CYCFG_PPC_SECURED_SCB7 0U
#define CYCFG_PPC_SECURED_SCB8 0U
#define CYCFG_PPC_SECURED_SCB9 0U
#define CYCFG_PPC_SECURED_SCB10 0U
#define CYCFG_PPC_SECURED_SCB11 0U
#define CYCFG_PPC_SECURED_SCB1 0U
#define CYCFG_PPC_SECURED_I3C 0U
#define CYCFG_PPC_SECURED_DFT 0U
#define CYCFG_PPC_SECURED_ETH0 0U
#define CYCFG_PPC_SECURED_MXNNLITE_2_0 0U
#define CYCFG_PPC_SECURED_PERI1_MAIN 0U
#define CYCFG_PPC_SECURED_PERI1_GR0_GROUP 0U
#define CYCFG_PPC_SECURED_PERI1_GR1_GROUP 0U
#define CYCFG_PPC_SECURED_PERI1_GR2_GROUP 0U
#define CYCFG_PPC_SECURED_PERI1_GR3_GROUP 0U
#define CYCFG_PPC_SECURED_PERI1_GR4_GROUP 0U
#define CYCFG_PPC_SECURED_PERI1_GR0_BOOT 0U
#define CYCFG_PPC_SECURED_PERI1_GR1_BOOT 0U
#define CYCFG_PPC_SECURED_PERI1_GR2_BOOT 0U
#define CYCFG_PPC_SECURED_PERI1_GR3_BOOT 0U
#define CYCFG_PPC_SECURED_PERI1_GR4_BOOT 0U
#define CYCFG_PPC_SECURED_PERI1_TR 0U
#define CYCFG_PPC_SECURED_PPC1_PPC_PPC_SECURE 1U
#define CYCFG_PPC_SECURED_PPC1_PPC_PPC_NONSECURE 1U
#define CYCFG_PPC_SECURED_PERI_PCLK1_MAIN 0U
#define CYCFG_PPC_SECURED_M55APPCPUSS 0U
#define CYCFG_PPC_SECURED_MXCM55_CM55 0U
#define CYCFG_PPC_SECURED_MXCM55_CM55_S 0U
#define CYCFG_PPC_SECURED_MXCM55_CM55_NS 0U
#define CYCFG_PPC_SECURED_MXCM55_BOOT 0U
#define CYCFG_PPC_SECURED_MXCM55_CM55_INT 0U
#define CYCFG_PPC_SECURED_SAXI_DMAC_TOP 0U
#define CYCFG_PPC_SECURED_SAXI_DMAC_CH0_CH 0U
#define CYCFG_PPC_SECURED_SAXI_DMAC_CH1_CH 0U
#define CYCFG_PPC_SECURED_SAXI_DMAC_CH2_CH 0U
#define CYCFG_PPC_SECURED_SAXI_DMAC_CH3_CH 0U
#define CYCFG_PPC_SECURED_APPCPUSS_ALL_PC 0U
#define CYCFG_PPC_SECURED_APPCPUSS_CM33_NS 0U
#define CYCFG_PPC_SECURED_APPCPUSS_MSC_INT 0U
#define CYCFG_PPC_SECURED_APPCPUSS_AHB2AXI_INT 0U
#define CYCFG_PPC_SECURED_APPCPUSS_AP 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS13_MAIN 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS14_MAIN 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS15_MAIN 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS19_MAIN 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS23_MAIN 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS25_MAIN 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS26_MAIN 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS27_MAIN 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS28_MAIN 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC13_PRIV 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC14_PRIV 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC15_PRIV 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC19_PRIV 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC25_PRIV 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC26_PRIV 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC27_PRIV 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC28_PRIV 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC13_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC14_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC15_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC19_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC25_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC26_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC27_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_CTL_MS_PC28_PRIV_MIR 0U
#define CYCFG_PPC_SECURED_MS_CTL_MSC_ACG 0U
#define CYCFG_PPC_SECURED_APPCPUSS_SL_CTL_GROUP 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT0_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT1_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT2_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT3_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT4_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT5_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT6_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT7_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT8_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT9_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT10_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT11_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT12_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT13_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT14_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_STRUCT15_IPC 0U
#define CYCFG_PPC_SECURED_IPC1_INTR_STRUCT0_INTR 0U
#define CYCFG_PPC_SECURED_IPC1_INTR_STRUCT1_INTR 0U
#define CYCFG_PPC_SECURED_IPC1_INTR_STRUCT2_INTR 0U
#define CYCFG_PPC_SECURED_IPC1_INTR_STRUCT3_INTR 0U
#define CYCFG_PPC_SECURED_IPC1_INTR_STRUCT4_INTR 0U
#define CYCFG_PPC_SECURED_IPC1_INTR_STRUCT5_INTR 0U
#define CYCFG_PPC_SECURED_IPC1_INTR_STRUCT6_INTR 0U
#define CYCFG_PPC_SECURED_IPC1_INTR_STRUCT7_INTR 0U
#define CYCFG_PPC_SECURED_PDM0_MAIN 0U
#define CYCFG_PPC_SECURED_PDM0_CH0_RX 0U
#define CYCFG_PPC_SECURED_PDM0_CH1_RX 0U
#define CYCFG_PPC_SECURED_PDM0_CH2_RX 0U
#define CYCFG_PPC_SECURED_PDM0_CH3_RX 0U
#define CYCFG_PPC_SECURED_PDM0_CH4_RX 0U
#define CYCFG_PPC_SECURED_PDM0_CH5_RX 0U
#define CYCFG_PPC_SECURED_TDM0_TDM_STRUCT0_TDM_TX_STRUCT_TX 0U
#define CYCFG_PPC_SECURED_TDM0_TDM_STRUCT1_TDM_TX_STRUCT_TX 0U
#define CYCFG_PPC_SECURED_TDM0_TDM_STRUCT0_TDM_RX_STRUCT_RX 0U
#define CYCFG_PPC_SECURED_TDM0_TDM_STRUCT1_TDM_RX_STRUCT_RX 0U
#define CYCFG_PPC_SECURED_SMIF0_CACHE_BLOCK_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF1_CACHE_BLOCK_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF0_CACHE_BLOCK_MMIO_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF1_CACHE_BLOCK_MMIO_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF0_CACHE_BLOCK_CACHEBLK_AHB_MPC0_PPC_MPC_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF1_CACHE_BLOCK_CACHEBLK_AHB_MPC0_PPC_MPC_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF0_CACHE_BLOCK_CACHEBLK_AHB_MPC0_PPC_MPC_PC 0U
#define CYCFG_PPC_SECURED_SMIF1_CACHE_BLOCK_CACHEBLK_AHB_MPC0_PPC_MPC_PC 0U
#define CYCFG_PPC_SECURED_SMIF0_CACHE_BLOCK_CACHEBLK_AHB_MPC0_PPC_MPC_ROT 0U
#define CYCFG_PPC_SECURED_SMIF1_CACHE_BLOCK_CACHEBLK_AHB_MPC0_PPC_MPC_ROT 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_CRYPTO 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_CRYPTO 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_MAIN2 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_MAIN2 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_DEVICE 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_DEVICE 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_AXI_MPC0_PPC_MPC_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_AXI_MPC0_PPC_MPC_MAIN 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_AXI_MPC0_PPC_MPC_PC 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_AXI_MPC0_PPC_MPC_PC 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_AXI_MPC0_PPC_MPC_ROT 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_AXI_MPC0_PPC_MPC_ROT 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_HSIOM_SMIF_PRT0_PRT 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_HSIOM_SMIF_PRT1_PRT 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_HSIOM_SMIF_PRT2_PRT 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_HSIOM_SMIF_PRT0_PRT 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_HSIOM_SMIF_PRT1_PRT 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_HSIOM_SMIF_PRT2_PRT 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_HSIOM_MON 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_HSIOM_MON 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_GPIO_SMIF_PRT0_PRT 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_GPIO_SMIF_PRT1_PRT 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_GPIO_SMIF_PRT2_PRT 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_GPIO_SMIF_PRT0_PRT 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_GPIO_SMIF_PRT1_PRT 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_GPIO_SMIF_PRT2_PRT 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_GPIO_SMIF_PRT0_CFG 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_GPIO_SMIF_PRT1_CFG 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_GPIO_SMIF_PRT2_CFG 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_GPIO_SMIF_PRT0_CFG 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_GPIO_SMIF_PRT1_CFG 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_GPIO_SMIF_PRT2_CFG 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_GPIO_GPIO 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_GPIO_GPIO 0U
#define CYCFG_PPC_SECURED_SMIF0_CORE_SMIF_GPIO_TEST 0U
#define CYCFG_PPC_SECURED_SMIF1_CORE_SMIF_GPIO_TEST 0U
#define CYCFG_PPC_SECURED_U550_U55 0U
#define CYCFG_PPC_SECURED_U550_ROT 0U
#define CYCFG_PPC_SECURED_U550_ACG 0U
#define CYCFG_PPC_SECURED_U550_MXU55_PPU_PPU 0U
#define CYCFG_PPC_SECURED_U550_PD_PD 0U
#define CYCFG_PPC_SECURED_SOCMEM_MAIN 0U
#define CYCFG_PPC_SECURED_SOCMEM_BOOT 0U
#define CYCFG_PPC_SECURED_SOCMEM_SOCMEM_PWR 0U
#define CYCFG_PPC_SECURED_SOCMEM_SRAM_MPC0_PPC_MPC_MAIN 0U
#define CYCFG_PPC_SECURED_SOCMEM_SRAM_MPC0_PPC_MPC_PC 0U
#define CYCFG_PPC_SECURED_SOCMEM_SRAM_MPC0_PPC_MPC_ROT 0U
#define CYCFG_PPC_SECURED_SOCMEM_MAIN_PORT 0U
#define CYCFG_PPC_SECURED_SOCMEM_PPU_SOCMEM_PPU 0U
#define CYCFG_PPC_SECURED_SOCMEM_SOCMEM_PD_PD 0U
#define CYCFG_PPC_SECURED_GFXSS_GPU_GFXSS 0U
#define CYCFG_PPC_SECURED_GFXSS_DC_GFXSS 0U
#define CYCFG_PPC_SECURED_GFXSS_MIPIDSI_GFXSS 0U
#define CYCFG_PPC_SECURED_SDHC0 0U
#define CYCFG_PPC_SECURED_SDHC1 0U
#define CYCFG_PPC_SECURED_USBHS_DWC_otg_intreg_CONTROLLER 0U
#define CYCFG_PPC_SECURED_USBHS_SS_SUBSYSTEM 0U
#define CYCFG_PPC_SECURED_ITCM 0U
#define CYCFG_PPC_SECURED_DTCM 0U

#endif /* #ifndef CYCFG_PPC_H */
