We’re bringing Aristotle to code.
AI is writing more code than anyone can review. We're building the AI that verifies it.
Starting today with C and Verilog.
One sentence. That’s the whole prompt.
Aristotle proved every multiply and divide instruction in the Ibex RISC-V core matches the official RISC-V spec, divide-by-zero and signed overflow included.
@satnam6502 walks through how he did it 👇
This article shows how a one line prompt can be used to formally verify MUL and DIV instructions of the Ibex RISC-V CPU using Aristotle. It's incredible easy to get started with formal hardware verification when you use Aristotle.
