Skip to content

Commit 4da5b14

Browse files
aemersontstellar
aemerson
authored and
tstellar
committed
[GlobalISel] Don't form anyextending atomic loads.
Until we can reliably check the legality and improve our selection of these, don't form them at all. (cherry picked from commit 60fc4ac)
1 parent a96b044 commit 4da5b14

5 files changed

Lines changed: 131 additions & 59 deletions

File tree

‎llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -591,8 +591,8 @@ bool CombinerHelper::matchCombineExtendingLoads(MachineInstr &MI,
591591
UseMI.getOpcode() == TargetOpcode::G_ZEXT ||
592592
(UseMI.getOpcode() == TargetOpcode::G_ANYEXT)) {
593593
const auto &MMO = LoadMI->getMMO();
594-
// For atomics, only form anyextending loads.
595-
if (MMO.isAtomic() && UseMI.getOpcode() != TargetOpcode::G_ANYEXT)
594+
// Don't do anything for atomics.
595+
if (MMO.isAtomic())
596596
continue;
597597
// Check for legality.
598598
if (!isPreLegalize()) {

‎llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll‎

Lines changed: 40 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -35,16 +35,24 @@ define i8 @load_atomic_i8_aligned_monotonic_const(ptr readonly %ptr) {
3535
}
3636

3737
define i8 @load_atomic_i8_aligned_acquire(ptr %ptr) {
38-
; CHECK-LABEL: load_atomic_i8_aligned_acquire:
39-
; CHECK: ldapurb w0, [x0, #4]
38+
; GISEL-LABEL: load_atomic_i8_aligned_acquire:
39+
; GISEL: add x8, x0, #4
40+
; GISEL: ldaprb w0, [x8]
41+
;
42+
; SDAG-LABEL: load_atomic_i8_aligned_acquire:
43+
; SDAG: ldapurb w0, [x0, #4]
4044
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
4145
%r = load atomic i8, ptr %gep acquire, align 1
4246
ret i8 %r
4347
}
4448

4549
define i8 @load_atomic_i8_aligned_acquire_const(ptr readonly %ptr) {
46-
; CHECK-LABEL: load_atomic_i8_aligned_acquire_const:
47-
; CHECK: ldapurb w0, [x0, #4]
50+
; GISEL-LABEL: load_atomic_i8_aligned_acquire_const:
51+
; GISEL: add x8, x0, #4
52+
; GISEL: ldaprb w0, [x8]
53+
;
54+
; SDAG-LABEL: load_atomic_i8_aligned_acquire_const:
55+
; SDAG: ldapurb w0, [x0, #4]
4856
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
4957
%r = load atomic i8, ptr %gep acquire, align 1
5058
ret i8 %r
@@ -101,16 +109,24 @@ define i16 @load_atomic_i16_aligned_monotonic_const(ptr readonly %ptr) {
101109
}
102110

103111
define i16 @load_atomic_i16_aligned_acquire(ptr %ptr) {
104-
; CHECK-LABEL: load_atomic_i16_aligned_acquire:
105-
; CHECK: ldapurh w0, [x0, #8]
112+
; GISEL-LABEL: load_atomic_i16_aligned_acquire:
113+
; GISEL: add x8, x0, #8
114+
; GISEL: ldaprh w0, [x8]
115+
;
116+
; SDAG-LABEL: load_atomic_i16_aligned_acquire:
117+
; SDAG: ldapurh w0, [x0, #8]
106118
%gep = getelementptr inbounds i16, ptr %ptr, i32 4
107119
%r = load atomic i16, ptr %gep acquire, align 2
108120
ret i16 %r
109121
}
110122

111123
define i16 @load_atomic_i16_aligned_acquire_const(ptr readonly %ptr) {
112-
; CHECK-LABEL: load_atomic_i16_aligned_acquire_const:
113-
; CHECK: ldapurh w0, [x0, #8]
124+
; GISEL-LABEL: load_atomic_i16_aligned_acquire_const:
125+
; GISEL: add x8, x0, #8
126+
; GISEL: ldaprh w0, [x8]
127+
;
128+
; SDAG-LABEL: load_atomic_i16_aligned_acquire_const:
129+
; SDAG: ldapurh w0, [x0, #8]
114130
%gep = getelementptr inbounds i16, ptr %ptr, i32 4
115131
%r = load atomic i16, ptr %gep acquire, align 2
116132
ret i16 %r
@@ -367,16 +383,24 @@ define i8 @load_atomic_i8_unaligned_monotonic_const(ptr readonly %ptr) {
367383
}
368384

369385
define i8 @load_atomic_i8_unaligned_acquire(ptr %ptr) {
370-
; CHECK-LABEL: load_atomic_i8_unaligned_acquire:
371-
; CHECK: ldapurb w0, [x0, #4]
386+
; GISEL-LABEL: load_atomic_i8_unaligned_acquire:
387+
; GISEL: add x8, x0, #4
388+
; GISEL: ldaprb w0, [x8]
389+
;
390+
; SDAG-LABEL: load_atomic_i8_unaligned_acquire:
391+
; SDAG: ldapurb w0, [x0, #4]
372392
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
373393
%r = load atomic i8, ptr %gep acquire, align 1
374394
ret i8 %r
375395
}
376396

377397
define i8 @load_atomic_i8_unaligned_acquire_const(ptr readonly %ptr) {
378-
; CHECK-LABEL: load_atomic_i8_unaligned_acquire_const:
379-
; CHECK: ldapurb w0, [x0, #4]
398+
; GISEL-LABEL: load_atomic_i8_unaligned_acquire_const:
399+
; GISEL: add x8, x0, #4
400+
; GISEL: ldaprb w0, [x8]
401+
;
402+
; SDAG-LABEL: load_atomic_i8_unaligned_acquire_const:
403+
; SDAG: ldapurb w0, [x0, #4]
380404
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
381405
%r = load atomic i8, ptr %gep acquire, align 1
382406
ret i8 %r
@@ -819,7 +843,8 @@ define i128 @load_atomic_i128_unaligned_seq_cst_const(ptr readonly %ptr) {
819843
define i8 @load_atomic_i8_from_gep() {
820844
; GISEL-LABEL: load_atomic_i8_from_gep:
821845
; GISEL: bl init
822-
; GISEL: ldapurb w0, [x8, #1]
846+
; GISEL: add x8, x8, #1
847+
; GISEL: ldaprb w0, [x8]
823848
;
824849
; SDAG-LABEL: load_atomic_i8_from_gep:
825850
; SDAG: bl init
@@ -834,7 +859,8 @@ define i8 @load_atomic_i8_from_gep() {
834859
define i16 @load_atomic_i16_from_gep() {
835860
; GISEL-LABEL: load_atomic_i16_from_gep:
836861
; GISEL: bl init
837-
; GISEL: ldapurh w0, [x8, #2]
862+
; GISEL: add x8, x8, #2
863+
; GISEL: ldaprh w0, [x8]
838864
;
839865
; SDAG-LABEL: load_atomic_i16_from_gep:
840866
; SDAG: bl init
@@ -884,7 +910,6 @@ define i128 @load_atomic_i128_from_gep() {
884910
;
885911
; SDAG-LABEL: load_atomic_i128_from_gep:
886912
; SDAG: bl init
887-
; SDAG: ldp x0, x1, [sp, #16]
888913
; SDAG: dmb ishld
889914
%a = alloca [3 x i128]
890915
call void @init(ptr %a)

‎llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll‎

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -993,24 +993,24 @@ define i8 @atomic_load_relaxed_8(ptr %p, i32 %off32) #0 {
993993
; CHECK-NOLSE-O1: ; %bb.0:
994994
; CHECK-NOLSE-O1-NEXT: ldrb w8, [x0, #4095]
995995
; CHECK-NOLSE-O1-NEXT: ldrb w9, [x0, w1, sxtw]
996-
; CHECK-NOLSE-O1-NEXT: add x11, x0, #291, lsl #12 ; =1191936
997996
; CHECK-NOLSE-O1-NEXT: ldurb w10, [x0, #-256]
998-
; CHECK-NOLSE-O1-NEXT: add w8, w8, w9
999-
; CHECK-NOLSE-O1-NEXT: ldrb w9, [x11]
1000-
; CHECK-NOLSE-O1-NEXT: add w8, w8, w10
1001-
; CHECK-NOLSE-O1-NEXT: add w0, w8, w9
997+
; CHECK-NOLSE-O1-NEXT: add w8, w9, w8, uxtb
998+
; CHECK-NOLSE-O1-NEXT: add x9, x0, #291, lsl #12 ; =1191936
999+
; CHECK-NOLSE-O1-NEXT: ldrb w9, [x9]
1000+
; CHECK-NOLSE-O1-NEXT: add w8, w8, w10, uxtb
1001+
; CHECK-NOLSE-O1-NEXT: add w0, w8, w9, uxtb
10021002
; CHECK-NOLSE-O1-NEXT: ret
10031003
;
10041004
; CHECK-OUTLINE-O1-LABEL: atomic_load_relaxed_8:
10051005
; CHECK-OUTLINE-O1: ; %bb.0:
10061006
; CHECK-OUTLINE-O1-NEXT: ldrb w8, [x0, #4095]
10071007
; CHECK-OUTLINE-O1-NEXT: ldrb w9, [x0, w1, sxtw]
1008-
; CHECK-OUTLINE-O1-NEXT: add x11, x0, #291, lsl #12 ; =1191936
10091008
; CHECK-OUTLINE-O1-NEXT: ldurb w10, [x0, #-256]
1010-
; CHECK-OUTLINE-O1-NEXT: add w8, w8, w9
1011-
; CHECK-OUTLINE-O1-NEXT: ldrb w9, [x11]
1012-
; CHECK-OUTLINE-O1-NEXT: add w8, w8, w10
1013-
; CHECK-OUTLINE-O1-NEXT: add w0, w8, w9
1009+
; CHECK-OUTLINE-O1-NEXT: add w8, w9, w8, uxtb
1010+
; CHECK-OUTLINE-O1-NEXT: add x9, x0, #291, lsl #12 ; =1191936
1011+
; CHECK-OUTLINE-O1-NEXT: ldrb w9, [x9]
1012+
; CHECK-OUTLINE-O1-NEXT: add w8, w8, w10, uxtb
1013+
; CHECK-OUTLINE-O1-NEXT: add w0, w8, w9, uxtb
10141014
; CHECK-OUTLINE-O1-NEXT: ret
10151015
;
10161016
; CHECK-NOLSE-O0-LABEL: atomic_load_relaxed_8:
@@ -1045,12 +1045,12 @@ define i8 @atomic_load_relaxed_8(ptr %p, i32 %off32) #0 {
10451045
; CHECK-LSE-O1: ; %bb.0:
10461046
; CHECK-LSE-O1-NEXT: ldrb w8, [x0, #4095]
10471047
; CHECK-LSE-O1-NEXT: ldrb w9, [x0, w1, sxtw]
1048-
; CHECK-LSE-O1-NEXT: ldurb w10, [x0, #-256]
1049-
; CHECK-LSE-O1-NEXT: add w8, w8, w10
1050-
; CHECK-LSE-O1-NEXT: add w8, w8, w9
1048+
; CHECK-LSE-O1-NEXT: add w8, w9, w8, uxtb
1049+
; CHECK-LSE-O1-NEXT: ldurb w9, [x0, #-256]
1050+
; CHECK-LSE-O1-NEXT: add w8, w8, w9, uxtb
10511051
; CHECK-LSE-O1-NEXT: add x9, x0, #291, lsl #12 ; =1191936
10521052
; CHECK-LSE-O1-NEXT: ldrb w9, [x9]
1053-
; CHECK-LSE-O1-NEXT: add w0, w8, w9
1053+
; CHECK-LSE-O1-NEXT: add w0, w8, w9, uxtb
10541054
; CHECK-LSE-O1-NEXT: ret
10551055
;
10561056
; CHECK-LSE-O0-LABEL: atomic_load_relaxed_8:
@@ -1089,24 +1089,24 @@ define i16 @atomic_load_relaxed_16(ptr %p, i32 %off32) #0 {
10891089
; CHECK-NOLSE-O1: ; %bb.0:
10901090
; CHECK-NOLSE-O1-NEXT: ldrh w8, [x0, #8190]
10911091
; CHECK-NOLSE-O1-NEXT: ldrh w9, [x0, w1, sxtw #1]
1092-
; CHECK-NOLSE-O1-NEXT: add x11, x0, #291, lsl #12 ; =1191936
10931092
; CHECK-NOLSE-O1-NEXT: ldurh w10, [x0, #-256]
1094-
; CHECK-NOLSE-O1-NEXT: add w8, w8, w9
1095-
; CHECK-NOLSE-O1-NEXT: ldrh w9, [x11]
1096-
; CHECK-NOLSE-O1-NEXT: add w8, w8, w10
1097-
; CHECK-NOLSE-O1-NEXT: add w0, w8, w9
1093+
; CHECK-NOLSE-O1-NEXT: add w8, w9, w8, uxth
1094+
; CHECK-NOLSE-O1-NEXT: add x9, x0, #291, lsl #12 ; =1191936
1095+
; CHECK-NOLSE-O1-NEXT: ldrh w9, [x9]
1096+
; CHECK-NOLSE-O1-NEXT: add w8, w8, w10, uxth
1097+
; CHECK-NOLSE-O1-NEXT: add w0, w8, w9, uxth
10981098
; CHECK-NOLSE-O1-NEXT: ret
10991099
;
11001100
; CHECK-OUTLINE-O1-LABEL: atomic_load_relaxed_16:
11011101
; CHECK-OUTLINE-O1: ; %bb.0:
11021102
; CHECK-OUTLINE-O1-NEXT: ldrh w8, [x0, #8190]
11031103
; CHECK-OUTLINE-O1-NEXT: ldrh w9, [x0, w1, sxtw #1]
1104-
; CHECK-OUTLINE-O1-NEXT: add x11, x0, #291, lsl #12 ; =1191936
11051104
; CHECK-OUTLINE-O1-NEXT: ldurh w10, [x0, #-256]
1106-
; CHECK-OUTLINE-O1-NEXT: add w8, w8, w9
1107-
; CHECK-OUTLINE-O1-NEXT: ldrh w9, [x11]
1108-
; CHECK-OUTLINE-O1-NEXT: add w8, w8, w10
1109-
; CHECK-OUTLINE-O1-NEXT: add w0, w8, w9
1105+
; CHECK-OUTLINE-O1-NEXT: add w8, w9, w8, uxth
1106+
; CHECK-OUTLINE-O1-NEXT: add x9, x0, #291, lsl #12 ; =1191936
1107+
; CHECK-OUTLINE-O1-NEXT: ldrh w9, [x9]
1108+
; CHECK-OUTLINE-O1-NEXT: add w8, w8, w10, uxth
1109+
; CHECK-OUTLINE-O1-NEXT: add w0, w8, w9, uxth
11101110
; CHECK-OUTLINE-O1-NEXT: ret
11111111
;
11121112
; CHECK-NOLSE-O0-LABEL: atomic_load_relaxed_16:
@@ -1141,12 +1141,12 @@ define i16 @atomic_load_relaxed_16(ptr %p, i32 %off32) #0 {
11411141
; CHECK-LSE-O1: ; %bb.0:
11421142
; CHECK-LSE-O1-NEXT: ldrh w8, [x0, #8190]
11431143
; CHECK-LSE-O1-NEXT: ldrh w9, [x0, w1, sxtw #1]
1144-
; CHECK-LSE-O1-NEXT: ldurh w10, [x0, #-256]
1145-
; CHECK-LSE-O1-NEXT: add w8, w8, w10
1146-
; CHECK-LSE-O1-NEXT: add w8, w8, w9
1144+
; CHECK-LSE-O1-NEXT: add w8, w9, w8, uxth
1145+
; CHECK-LSE-O1-NEXT: ldurh w9, [x0, #-256]
1146+
; CHECK-LSE-O1-NEXT: add w8, w8, w9, uxth
11471147
; CHECK-LSE-O1-NEXT: add x9, x0, #291, lsl #12 ; =1191936
11481148
; CHECK-LSE-O1-NEXT: ldrh w9, [x9]
1149-
; CHECK-LSE-O1-NEXT: add w0, w8, w9
1149+
; CHECK-LSE-O1-NEXT: add w0, w8, w9, uxth
11501150
; CHECK-LSE-O1-NEXT: ret
11511151
;
11521152
; CHECK-LSE-O0-LABEL: atomic_load_relaxed_16:

‎llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll‎

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -385,13 +385,13 @@ define i8 @atomic_load_relaxed_8(ptr %p, i32 %off32) {
385385
; CHECK-NEXT: liveins: $w1, $x0
386386
; CHECK-NEXT: {{ $}}
387387
; CHECK-NEXT: renamable $w8 = LDRBBui renamable $x0, 4095, pcsections !0 :: (load monotonic (s8) from %ir.ptr_unsigned)
388-
; CHECK-NEXT: renamable $w9 = LDRBBroW renamable $x0, killed renamable $w1, 1, 0, pcsections !0 :: (load unordered (s8) from %ir.ptr_regoff)
389-
; CHECK-NEXT: renamable $w10 = LDURBBi renamable $x0, -256, pcsections !0 :: (load monotonic (s8) from %ir.ptr_unscaled)
390-
; CHECK-NEXT: renamable $x11 = ADDXri killed renamable $x0, 291, 12
391-
; CHECK-NEXT: $w8 = ADDWrs killed renamable $w8, killed renamable $w9, 0, pcsections !0
392-
; CHECK-NEXT: renamable $w9 = LDRBBui killed renamable $x11, 0, pcsections !0 :: (load unordered (s8) from %ir.ptr_random)
393-
; CHECK-NEXT: $w8 = ADDWrs killed renamable $w8, killed renamable $w10, 0, pcsections !0
394-
; CHECK-NEXT: $w0 = ADDWrs killed renamable $w8, killed renamable $w9, 0, pcsections !0
388+
; CHECK-NEXT: renamable $w9 = LDRBBroW renamable $x0, killed renamable $w1, 1, 0 :: (load unordered (s8) from %ir.ptr_regoff)
389+
; CHECK-NEXT: renamable $w10 = LDURBBi renamable $x0, -256 :: (load monotonic (s8) from %ir.ptr_unscaled)
390+
; CHECK-NEXT: renamable $w8 = ADDWrx killed renamable $w9, killed renamable $w8, 0, pcsections !0
391+
; CHECK-NEXT: renamable $x9 = ADDXri killed renamable $x0, 291, 12
392+
; CHECK-NEXT: renamable $w8 = ADDWrx killed renamable $w8, killed renamable $w10, 0, pcsections !0
393+
; CHECK-NEXT: renamable $w9 = LDRBBui killed renamable $x9, 0, pcsections !0 :: (load unordered (s8) from %ir.ptr_random)
394+
; CHECK-NEXT: renamable $w0 = ADDWrx killed renamable $w8, killed renamable $w9, 0, pcsections !0
395395
; CHECK-NEXT: RET undef $lr, implicit $w0
396396
%ptr_unsigned = getelementptr i8, ptr %p, i32 4095
397397
%val_unsigned = load atomic i8, ptr %ptr_unsigned monotonic, align 1, !pcsections !0
@@ -417,13 +417,13 @@ define i16 @atomic_load_relaxed_16(ptr %p, i32 %off32) {
417417
; CHECK-NEXT: liveins: $w1, $x0
418418
; CHECK-NEXT: {{ $}}
419419
; CHECK-NEXT: renamable $w8 = LDRHHui renamable $x0, 4095, pcsections !0 :: (load monotonic (s16) from %ir.ptr_unsigned)
420-
; CHECK-NEXT: renamable $w9 = LDRHHroW renamable $x0, killed renamable $w1, 1, 1, pcsections !0 :: (load unordered (s16) from %ir.ptr_regoff)
421-
; CHECK-NEXT: renamable $w10 = LDURHHi renamable $x0, -256, pcsections !0 :: (load monotonic (s16) from %ir.ptr_unscaled)
422-
; CHECK-NEXT: renamable $x11 = ADDXri killed renamable $x0, 291, 12
423-
; CHECK-NEXT: $w8 = ADDWrs killed renamable $w8, killed renamable $w9, 0, pcsections !0
424-
; CHECK-NEXT: renamable $w9 = LDRHHui killed renamable $x11, 0, pcsections !0 :: (load unordered (s16) from %ir.ptr_random)
425-
; CHECK-NEXT: $w8 = ADDWrs killed renamable $w8, killed renamable $w10, 0, pcsections !0
426-
; CHECK-NEXT: $w0 = ADDWrs killed renamable $w8, killed renamable $w9, 0, pcsections !0
420+
; CHECK-NEXT: renamable $w9 = LDRHHroW renamable $x0, killed renamable $w1, 1, 1 :: (load unordered (s16) from %ir.ptr_regoff)
421+
; CHECK-NEXT: renamable $w10 = LDURHHi renamable $x0, -256 :: (load monotonic (s16) from %ir.ptr_unscaled)
422+
; CHECK-NEXT: renamable $w8 = ADDWrx killed renamable $w9, killed renamable $w8, 8, pcsections !0
423+
; CHECK-NEXT: renamable $x9 = ADDXri killed renamable $x0, 291, 12
424+
; CHECK-NEXT: renamable $w8 = ADDWrx killed renamable $w8, killed renamable $w10, 8, pcsections !0
425+
; CHECK-NEXT: renamable $w9 = LDRHHui killed renamable $x9, 0, pcsections !0 :: (load unordered (s16) from %ir.ptr_random)
426+
; CHECK-NEXT: renamable $w0 = ADDWrx killed renamable $w8, killed renamable $w9, 8, pcsections !0
427427
; CHECK-NEXT: RET undef $lr, implicit $w0
428428
%ptr_unsigned = getelementptr i16, ptr %p, i32 4095
429429
%val_unsigned = load atomic i16, ptr %ptr_unsigned monotonic, align 2, !pcsections !0

‎llvm/test/CodeGen/AArch64/GlobalISel/atomic-anyextending-load-crash.ll‎

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
2+
; RUN: llc -global-isel -global-isel-abort=1 -O0 -o - %s | FileCheck %s
3+
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
4+
target triple = "arm64e-apple-macosx14.0.0"
5+
6+
define void @test(ptr %0) {
7+
; CHECK-LABEL: test:
8+
; CHECK: ; %bb.0: ; %entry
9+
; CHECK-NEXT: sub sp, sp, #144
10+
; CHECK-NEXT: stp x29, x30, [sp, #128] ; 16-byte Folded Spill
11+
; CHECK-NEXT: .cfi_def_cfa_offset 144
12+
; CHECK-NEXT: .cfi_offset w30, -8
13+
; CHECK-NEXT: .cfi_offset w29, -16
14+
; CHECK-NEXT: ldar w8, [x0]
15+
; CHECK-NEXT: str w8, [sp, #116] ; 4-byte Folded Spill
16+
; CHECK-NEXT: mov x8, #0 ; =0x0
17+
; CHECK-NEXT: str x8, [sp, #120] ; 8-byte Folded Spill
18+
; CHECK-NEXT: blr x8
19+
; CHECK-NEXT: ldr w11, [sp, #116] ; 4-byte Folded Reload
20+
; CHECK-NEXT: ldr x8, [sp, #120] ; 8-byte Folded Reload
21+
; CHECK-NEXT: mov x9, sp
22+
; CHECK-NEXT: str xzr, [x9]
23+
; CHECK-NEXT: str xzr, [x9, #8]
24+
; CHECK-NEXT: str xzr, [x9, #16]
25+
; CHECK-NEXT: str xzr, [x9, #24]
26+
; CHECK-NEXT: str xzr, [x9, #32]
27+
; CHECK-NEXT: str xzr, [x9, #40]
28+
; CHECK-NEXT: ; implicit-def: $x10
29+
; CHECK-NEXT: mov x10, x11
30+
; CHECK-NEXT: str x10, [x9, #48]
31+
; CHECK-NEXT: str xzr, [x9, #56]
32+
; CHECK-NEXT: str xzr, [x9, #64]
33+
; CHECK-NEXT: str xzr, [x9, #72]
34+
; CHECK-NEXT: str xzr, [x9, #80]
35+
; CHECK-NEXT: str xzr, [x9, #88]
36+
; CHECK-NEXT: str xzr, [x9, #96]
37+
; CHECK-NEXT: mov x0, x8
38+
; CHECK-NEXT: blr x8
39+
; CHECK-NEXT: ldp x29, x30, [sp, #128] ; 16-byte Folded Reload
40+
; CHECK-NEXT: add sp, sp, #144
41+
; CHECK-NEXT: ret
42+
entry:
43+
%atomic-load = load atomic i32, ptr %0 seq_cst, align 4
44+
%call10 = call ptr null()
45+
call void (ptr, ...) null(ptr null, ptr null, i32 0, ptr null, ptr null, i32 0, i32 0, i32 %atomic-load, i32 0, i32 0, i32 0, i32 0, i64 0, ptr null)
46+
ret void
47+
}

0 commit comments

Comments
 (0)