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kadgitub7/README.md

Kadhir Ponnambalam

McMaster Engineering (BEng Co-op, '25–'29) · Embedded systems · FPGA/Verilog · Backend tooling

Projects

Project Stack Links
AccessoBox (Capstone) Arduino, embedded C, CAD/3D printing GitHub · Demo
Anomaly Detection Logger Flask, HDFS, Spark, SQL GitHub · Demo
EZ-MLAI Python, REST APIs, ML pipeline GitHub · Demo

Research

  • HADI Labs, McMaster — FPGA devices for real-time Calcium Imaging algorithms
  • ECE Lab, McMaster — Novel flexible temperature sensing materials
  • Co-author on peer-reviewed publications in flexible sensing & ML for big data

Skills

Python Embedded C Verilog FPGA Flask REST APIs SQL Spark/HDFS Computer Architecture

LinkedIn · GitHub · kadhir.ponnambalam@gmail.com

Pinned Loading

  1. portfolio portfolio Public

    Check me out

    JavaScript

  2. FPGA-x-CDS-NI FPGA-x-CDS-NI Public

    Developing an FPGA device that accelerated the processing of a CDS(Cognitive Dynamic System) + NI(Natural Intelligence) algorithm

    Python

  3. CDS-NI-Algorithm CDS-NI-Algorithm Public

    Implementing and improving the CDS NI Algorithm here: https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=8930480

    Python

  4. verilog-FPGA-design-master-repository verilog-FPGA-design-master-repository Public

    Creating a master repository for my path to learning verilog and FPGA design

    Verilog