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This pattern is the standard way to express a compiler-only memory barrier on x86-64, where acquire/release fences don't require CPU instructions (due to TSO memory model) but still need to prevent compiler reordering.
Current Behavior
tcc:
Compilation with unknown C compiler
================== C compilation error (from tcc): ==============
cc: /tmp/v_1000/main.01KKCPGT9T6G9Y67QQ1ZJXGC8W.tmp.c:4581: error: string constant expected
=================================================================
Describe the bug
When using asm volatile amd64 with only a memory clobber and no instructions, V generates invalid code that fails to compile with tcc/gcc.
Using nop as a placeholder instruction compiles successfully with tcc but generates unnecessary CPU instructions.
Reproduction Steps
Expected Behavior
This pattern is the standard way to express a compiler-only memory barrier on x86-64, where acquire/release fences don't require CPU instructions (due to TSO memory model) but still need to prevent compiler reordering.
Current Behavior
tcc:
gcc:
Possible Solution
No response
Additional Information/Context
No response
V version
V 0.5.1 07ee934
Environment details (OS name and version, etc.)
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