Special Reports

Why Physical AI Is So Hard To Engineer

By: Brian Bailey

Integrating sensors, compute, and actuators into autonomous systems adds new challenges for chip design.
Closing The Visibility Gap

By: Gregory Haley

More measurements don’t eliminate blind spots when each view captures only part of the device.
Photonics Fundamentals For Electronics Engineers: eBook

By: Bryon Moyer

What it is, why it's important, and how it's impacting the movement of data.

 more »

Top Stories

Why Open-Weight AI Matters

 Proprietary models still hold the edge, but open-weight models add more flexibility for...
October 15th, 2026 By Ann Mutschler

Agentic AI Alters The CPU-GPU Balance

 Agentic workloads increase CPU demand, while reasoning models, MoE architectures, and r...
October 15th, 2026 By Bryon Moyer

How Close Are We To Fully Autonomous Chip Design?

 Synopsys CEO Sassine Ghazi talks about AI agents, the limits of autonomous engineering,...
October 15th, 2026 By Ed Sperling

Why Heat Is Becoming A Bigger Chip Design Issue

 Increasing complexity requires thermal, electrical, and mechanical effects to be analyz...
October 14th, 2026 By Ed Sperling

Startup Funding: Q3 2026

 80 startups raised $8.5B in Q3, with big hauls by companies tackling data movement and ...
October 12th, 2026 By Jesse Allen

Shift Left Complicates Fab Data Management

 Streaming sensor data creates new challenges for advanced process control.
October 8th, 2026 By Anne Meixner and Laura Peters

CPO Testing Faces A Moving Target Problem

 Test vendors are adapting to changing connector architectures and extreme alignment tol...
October 8th, 2026 By Laura Peters

Thermal Complexity Grows With AI Chips And Photonics

 Increasing power density makes heat, stress, and aging harder to predict, and more crit...
October 7th, 2026 By Ed Sperling

Extreme Environments Push Chips To Their Breaking Point

 Orbital data centers, defense systems, quantum computing, particle physics, and advance...
October 5th, 2026 By Liz Allan

The Hidden Challenges of Edge AI Design

 As models evolve faster than silicon cycles, chip architects must balance flexible comp...
October 1st, 2026 By Ann Mutschler

AI-Defined Vehicles Push Compute, Memory, And Validation Limits

 The shift from software-defined to AI-defined vehicles raises questions about whether t...
October 1st, 2026 By Brendan Heffernan

Turning Edge AI Data Into Real-Time Action

 On-device AI can deliver faster insights, greater autonomy, and less cloud traffic — ...
October 1st, 2026 By Liz Allan

One Substrate No Longer Rules Them All

 Larger packages, finer routing, and embedded functions are pushing advanced substrates ...
September 28th, 2026 By Gregory Haley

When AI Agents Cross Chip Design Silos

 Specialization and orchestration are becoming more important as the role of AI agents i...
September 24th, 2026 By Ed Sperling

EDA’s Future Is Evidence-Driven Automation

 AI may accelerate semiconductor design, but users still need formal proof, semantic con...
September 24th, 2026 By Ann Mutschler

3D Chips Push EDA Into New Territory

 As AI chips move to stacked, chiplet-based architectures, EDA vendors are reworking mat...
September 24th, 2026 By Liz Allan

Multi-Agent AI Systems Must Work Like An Orchestra Without A Conductor

 A mixture of expert agentic AI systems can focus on their tasks with or without a comma...
September 23rd, 2026 By Liz Allan

How Robotics And Intelligent Equipment Control Drive Next-Gen Fab Productivity

 Behind the scenes, advanced equipment control and robotics are enabling higher levels o...
September 21st, 2026 By Laura Peters

Why Package Digital Twins Are So Hard To Build

 Models need to be synchronized with what manufacturing actually builds.
September 17th, 2026 By Gregory Haley

Negative Expansion Materials Resist Warpage

 Molding compounds and underfill can improve thermal stability.
September 17th, 2026 By Bryon Moyer

more top stories »

Latest News

Chip Industry Week In Review

 Fab expansion accelerates; China advances memory and EUV; Teradyne's test deal; SEMICON West and OCP highlights; 3D SiP; TSMC and ASML signals; 300mm fab spending...
October 16th, 2026 By The SE Staff

Blog Review: Oct. 14

 Engineers' role in autonomous workflows; UALink over UCIe; GDDR7; on-device speech filtering.
October 14th, 2026 By Jesse Allen

Chip Industry Week In Review

 $2B foundry pact; hyper-NA EUV; TSMC, Samsung financials; Canon readies nanoimprint; AI chips under scrutiny; $10T data center buildout; $1.5B SiC boost; chip smu...
October 9th, 2026 By The SE Staff

more news »



Perspectives & Analysis

Advancing The CFET-Based Device Roadmap: Novel Integration Modules And Standa...

 Part 2: Toward scalable sCFET standard cell architectures: spl...
October 6th, 2026 By Geert Hellings

The Agentic AI Super Cycle

 AI is the biggest revolution of our lives, and it will grow ex...
October 5th, 2026 By Geoff Tate

more perspectives »



Research

Chip Industry Technical Paper Roundup: Oct. 20

 HBM power consumption; GAAFET leakage pathways; agentic AI for...
By Linda Christensen

Chip Industry Technical Paper Roundup: Oct. 13

 M3D mem-TFT neuromorphic computing; 2D semiconductor nucleatio...
By Linda Christensen

Chip Industry Technical Paper Roundup: Oct. 6

 Low-contact-resistance WSe₂ transistors; backside clock mesh...
By Linda Christensen

more research »



Startup Corner

Startup Funding: Q3 2026

 80 startups raised $8.5B in Q3, with big hauls by companies ta...
By Jesse Allen

Moores Lab AI: Applying Agentic AI Across Chip Design

 EDA startup bets on domain expertise to speed the design process.
By Brendan Heffernan

more startups »

Videos

Moving Test Data Faster

September 16th, 2026

The Intersection Of AI And Voice At The Edge

September 9th, 2026

Smart Outlier Detection

September 8th, 2026

Redefining Roles For Edge And Cloud AI

August 25th, 2026

Knowledge Centers / Entities, people and technologies explored

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