Using local power and ground net to keep high frequency currents off global ground plane
I recently read the accepted answer here, by Olin Lathrop: Decoupling caps, PCB layout
It talks about preventing an IC from acting as a center fed patch antenna by keeping the high frequency currents generated by the IC off the global ground plane. This is achieved by using localized bypassing and local power and ground nets. The local power and ground net should be tied to the global power net and global ground plane only at one point.
I think I understand the contents of the answer, but I want to make sure I get the implementation right.
The thing I'm most uncertain about is where to tie the two nets together.
Here I've created an artificial example: A voltage regulator delivering global power (VDD_GLOBAL and GND_GLOBAL); a locally bypassed microcontroller using local nets (VDD_IC, GND_IC), and two "net ties" to tie the nets together at one point.
I believe this is the right way to implement the local nets and bypassing, as described in Olin's answer.
Here is the layout and routing. I have connected the global ground and power net from the regulator to the local power net of the IC as the traces are on their way to the decoupling capacitors. The blue shade is the global ground plane on the bottom layer. I haven't put effort into the layout as this is an artificial example.
Is this the correct way to do it? Is the net tie point appropriate, or should it be positioned differently, like under the microcontroller itself?
1 answer
The component with the local ground net still needs to be well-connected to the main ground.
The best place for the single connection between the main ground and the local ground net is therefore as close as possible to the IC ground pin. When the IC has multiple ground pins, like many microcontrollers do, I usually connect the grounds locally first, then put the connection to the main ground somewhere roughly centered under the IC or its various ground pins. Here is an example:
The top layer is shown in red, with the master ground plane in layer 2. IC5 is a microcontroller with three ground pins. Those are tied together in the middle below the IC. The connection to the main ground is made by SH2, which is two vias connected together. That's one of various stock parts I have called "shorts" that tie two nets together where I choose, while Eagle thinks of them as separate nets. This particular "short" connects on all layers. I have others that connect only on a single layer.
Note that the ground side of the three bypass caps, C26, C20, and C19 connect to the micro's ground pins but not to the main ground. Those caps carry the high frequency power currents generated by IC5 and contain them locally. The ground to the crystal caps of Y1 (C25 and C24) are also local.
This micro also has analog power and ground pins, which are right above C21. To keep the micro's analog ground as clean as possible, it has its own via to the main ground. It's a bit hard to see in this picture, but the via immediately above C21 is connected to the ground plane, while most of the other vias are not. The pin immediately right of the analog ground is the analog power. You can see it connects to the other side of C21. In this case, the analog power comes from the main 3.3 V power, but thru the chip inductor L5. L5 and C21 filter out some of the noise on the main 3.3 V supply to make the analog power to the micro.
You don't usually need a separate net for power. Good bypassing at each use of the power net reduces the requirement of low impedance everywhere. In the example above, the main 3.3 V power was directly connected to the three power pins of the micro. A bit of impedance in that power feed doesn't matter much since the local bypass caps C26, C20, and C19 keep the impedance low right at the micro's power pins.
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