Generalize MOS transistor extraction to other gate figures

[klayoutmatthias]

Currently, the extraction is limited to rectangular gate shapes.

However there are cases where the gate isn't rectangular or it may be circular.

The proposed (and backward-compatible) enhancement is to compute the gate width and length using this alternative scheme:

• Determine the interacting edges between source and gate and drain
• Determine their total lengths (E(drain) and E(source))
• The transistor's width is computed as their average: W = (E(drain) + E(source)) / 2
• The transistor's length is computed from the relation: A(gate) = W * L, hence L = A(gate) / W

This scheme should be application to all kind of gate/source/drain geometries as long as the basic assumption of a "gate" is applicable. Which is that a gate is basically bridging a source and drain region.