[https://nvbugs/5782112][fix] Cherry-pick #10633: Fix hanging issue for MNNVL Allreduce under PP#10750
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…nder PP (NVIDIA#10633) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com>
Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com>
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📝 WalkthroughWalkthroughConstructor signatures for McastGPUBuffer and McastDeviceMemory are updated across C++ headers, implementations, and Python bindings by removing the splitColor parameter and adding an mpiCommFortranHandle parameter. Python code is modified to use class-level workspace caching and pass the Fortran MPI communicator handle. Changes
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⚠️ Outside diff range comments (6)
cpp/tensorrt_llm/runtime/mcastDeviceMemory.h (1)
1-3: Update the copyright year to 2026.Line 2 still lists 2025 even though this file was modified in 2026. Please bump the year to the latest meaningful modification.
As per coding guidelines, update the header year to reflect the latest meaningful modification.🧾 Suggested update
- * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved.cpp/tensorrt_llm/pybind/runtime/bindings.cpp (1)
1-3: Update SPDX copyright year to 2026.Line 2 still ends at 2025; this file was modified in 2026. Please bump the year to reflect the latest meaningful modification.
As per coding guidelines, update the header year to reflect the latest meaningful modification.🧾 Suggested update
- * SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.cpp/tensorrt_llm/nanobind/runtime/bindings.cpp (1)
1-3: Update SPDX copyright year to 2026.Line 2 still ends at 2025; this file was modified in 2026. Please bump the year to reflect the latest meaningful modification.
As per coding guidelines, update the header year to reflect the latest meaningful modification.🧾 Suggested update
- * SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.cpp/tensorrt_llm/runtime/mcastGPUBuffer.h (1)
1-3: Update the copyright year to 2026.Line 2 still lists 2025 even though this file was modified in 2026. Please bump the year to the latest meaningful modification.
As per coding guidelines, update the header year to reflect the latest meaningful modification.🧾 Suggested update
- * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved.cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp (2)
1-3: Update the copyright year to 2026.Line 2 still lists 2025 even though this file was modified in 2026. Please bump the year to the latest meaningful modification.
As per coding guidelines, update the header year to reflect the latest meaningful modification.🧾 Suggested update
- * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved.
40-55: Add validation for MPI communicator validity and rank/size consistency before collective operations.The constructor initializes
mGroupCommtonullptrwhenENABLE_MULTI_DEVICEis disabled, but bothallocMnMcastMem()(lines ~160, 176) andallocNvlsMcastMem()(line 219) unconditionally invoke collective operations on this communicator. WhenENABLE_MULTI_DEVICEis off, calls toallgather(),bcast(), andgetWorldRanks()will fail with a null MPI communicator. Additionally, the constructor acceptsgroupRankandgroupSizeparameters without validating that they match the actual communicator's rank and size, risking silent mismatches that cause deadlocks in collective operations.
🧹 Nitpick comments (2)
tensorrt_llm/_torch/distributed/ops.py (1)
518-518: Annotate mutable class attribute withClassVar.Per PEP 526 and static analysis (RUF012), mutable class attributes intended to be shared across instances should be annotated with
typing.ClassVarto make the intent explicit and prevent IDE/type-checker confusion.Suggested fix
-from typing import Dict, List, Optional, Tuple, Union +from typing import ClassVar, Dict, List, Optional, Tuple, Union- allreduce_mnnvl_workspaces: Dict[Mapping, Dict] = {} + allreduce_mnnvl_workspaces: ClassVar[Dict[Mapping, Dict]] = {}cpp/tensorrt_llm/runtime/mcastDeviceMemory.h (1)
46-47: Add Doxygen docs for the new MPI handle parameter.Line 46 adds
mpiCommFortranHandlein a public header; please add Doxygen//!parameter docs so the new argument is documented.As per coding guidelines, document new public prototypes in headers.📘 Suggested documentation
- McastDeviceMemory(size_t bufSize, uint32_t groupSize, uint32_t groupRank, int deviceIdx, bool mnNvlink, - int64_t mpiCommFortranHandle); + //! \brief Construct multicast device memory for a communication group. + //! \param bufSize Buffer size in bytes. + //! \param groupSize Number of ranks in the group. + //! \param groupRank Rank of the local process within the group. + //! \param deviceIdx CUDA device index. + //! \param mnNvlink Whether multi-node NVLink is used. + //! \param mpiCommFortranHandle Fortran MPI communicator handle (from Python mpi4py). + McastDeviceMemory(size_t bufSize, uint32_t groupSize, uint32_t groupRank, int deviceIdx, bool mnNvlink, + int64_t mpiCommFortranHandle);
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🧠 Learnings (5)
📚 Learning: 2025-09-02T13:42:44.885Z
Learnt from: pcastonguay
Repo: NVIDIA/TensorRT-LLM PR: 7455
File: tensorrt_llm/_torch/pyexecutor/py_executor.py:1852-1860
Timestamp: 2025-09-02T13:42:44.885Z
Learning: In MPI communication within TensorRT-LLM pipeline parallelism, different communication types (tokens, logits, termination sync) must use disjoint tag namespaces to avoid message routing collisions when using the same source/destination patterns.
Applied to files:
cpp/tensorrt_llm/runtime/mcastDeviceMemory.hcpp/tensorrt_llm/nanobind/runtime/bindings.cppcpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp
📚 Learning: 2025-08-14T06:36:40.701Z
Learnt from: timlee0212
Repo: NVIDIA/TensorRT-LLM PR: 6886
File: tensorrt_llm/_torch/models/modeling_deepseekv3.py:0-0
Timestamp: 2025-08-14T06:36:40.701Z
Learning: In DeepSeek V3 model (tensorrt_llm/_torch/models/modeling_deepseekv3.py), the disagreement between AllReduce.__init__ guard and _compute_mlp_tp_size logic for MNNVL usage is expected by design. The AllReduce component and MLP TP-size computation intentionally use different criteria for MNNVL availability decisions.
Applied to files:
tensorrt_llm/_torch/distributed/ops.py
📚 Learning: 2025-09-23T15:12:38.312Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/thop/allreduceOp.cpp:352-446
Timestamp: 2025-09-23T15:12:38.312Z
Learning: In TensorRT-LLM NCCL device implementation, NCCL version 2.28+ requirements are handled at runtime in the nccl_device/config layer rather than with compile-time guards. This allows the allreduceOp to remain version-agnostic and delegates version compatibility validation to the appropriate lower-level components that can gracefully handle unsupported configurations.
Applied to files:
tensorrt_llm/_torch/distributed/ops.py
📚 Learning: 2025-09-24T03:31:28.908Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 7520
File: tensorrt_llm/_torch/pyexecutor/resource_manager.py:605-613
Timestamp: 2025-09-24T03:31:28.908Z
Learning: In TensorRT-LLM Ray orchestrator mode, ProcessGroups are initialized with both Gloo and NCCL backends (e.g., "cuda:nccl,cpu:gloo"), allowing PyTorch distributed to automatically route CPU tensors through Gloo and GPU tensors through NCCL. This eliminates the need for manual device placement when performing allreduce operations on base types.
Applied to files:
cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp
📚 Learning: 2025-09-23T14:58:05.372Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:42-49
Timestamp: 2025-09-23T14:58:05.372Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/), the token partitioning intentionally uses ceil-like distribution (same token_per_rank for all ranks) to ensure all ranks launch the same number of blocks. This is required for optimal NCCL device API barrier performance, even though it may launch extra blocks for non-existent tokens on later ranks. Runtime bounds checking in the kernel (blockID validation) handles the overshoot cases.
Applied to files:
cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp
🧬 Code graph analysis (2)
cpp/tensorrt_llm/runtime/mcastDeviceMemory.h (1)
cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp (2)
McastDeviceMemory(40-109)McastDeviceMemory(111-134)
tensorrt_llm/_torch/distributed/ops.py (3)
tensorrt_llm/mapping.py (2)
pp_rank(588-589)tp_rank(584-585)tensorrt_llm/_torch/distributed/communicator.py (3)
pp_rank(125-126)tp_size(113-114)tp_rank(121-122)cpp/tensorrt_llm/runtime/mcastGPUBuffer.h (1)
McastGPUBuffer(26-68)
🪛 Ruff (0.14.11)
tensorrt_llm/_torch/distributed/ops.py
518-518: Mutable class attributes should be annotated with typing.ClassVar
(RUF012)
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🔇 Additional comments (8)
tensorrt_llm/_torch/distributed/ops.py (4)
68-70: Intentional change to shared workspace storage looks correct for the PP fix.The transition from thread-local to class-level storage enables workspace sharing across threads, which addresses the hanging issue. The comment clearly documents this intent.
Note for future maintenance: the check-then-modify pattern at lines 77-78 is not atomic. If concurrent initialization becomes possible in future architectures, consider adding synchronization (e.g., a
threading.Lock).
102-104: LGTM - logging from all ranks provides better diagnostics.Debug-level logging from all ranks is acceptable and can help diagnose issues in multi-rank deployments. Since this is at
debuglevel, it won't impact production unless explicitly enabled.
107-114: Correct integration with updated McastGPUBuffer interface.Passing the pre-split MPI communicator's Fortran handle (
comm.py2f()) aligns with the C++ constructor signature and avoids redundant communicator splitting in the C++ layer. This change properly addresses the PP hanging issue by ensuring consistent communicator usage.
532-532: LGTM - clean initialization call.Removing the unused assignment is a valid cleanup. The function call for its side effect (workspace initialization) is clear.
cpp/tensorrt_llm/nanobind/runtime/bindings.cpp (1)
349-352: Nanobind constructor update looks aligned.Line 350 mirrors the new C++ signature; please keep it in lockstep with the pybind binding and ensure nanobind binding tests cover the updated constructor.
cpp/tensorrt_llm/runtime/mcastGPUBuffer.h (1)
37-42: Constructor signature/doc update looks good.Line 40 correctly wires the new
mpiCommFortranHandleparameter through toMcastDeviceMemory.cpp/tensorrt_llm/runtime/mcastDeviceMemory.cpp (1)
72-75: Log message update is clear.Line 72’s reordered fields read consistently with the new constructor signature.
cpp/tensorrt_llm/pybind/runtime/bindings.cpp (1)
445-448: The review comment is based on an incorrect premise. The C++ constructor signature forMcastGPUBuffernever contained asplit_colorparameter—there is no evidence of this parameter existing in the codebase. The current signature matches the Python bindings exactly, and the only Python call site found (intensorrt_llm/_torch/distributed/ops.py:108–113) already uses the correct argument order. No compatibility issues or positional argument mismapping exists.Likely an incorrect or invalid review comment.
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…ssue for MNNVL Allreduce under PP (NVIDIA#10750) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com>
…ssue for MNNVL Allreduce under PP (NVIDIA#10750) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com> Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
…ssue for MNNVL Allreduce under PP (NVIDIA#10750) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com> Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
…ssue for MNNVL Allreduce under PP (NVIDIA#10750) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com> Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
…ssue for MNNVL Allreduce under PP (NVIDIA#10750) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com> Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
…ssue for MNNVL Allreduce under PP (NVIDIA#10750) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com> Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
…ssue for MNNVL Allreduce under PP (NVIDIA#10750) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com> Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
…ssue for MNNVL Allreduce under PP (NVIDIA#10750) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com> Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
…or MNNVL Allreduce under PP (#10750) Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com> Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
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