[https://nvbugs/5624818][fix] Work around accuracy issue by enforcing paged_context_fmha on Hopper for fmha_v2#11192
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PR_Github #34471 [ run ] triggered by Bot. Commit: |
📝 WalkthroughWalkthroughA guarded CUDA driver import was added to the attention backend module. A runtime check was introduced to automatically enable paged context FMHA on SM90 GPUs (compute capability major == 9) across multiple attention wrapper methods, creating a new conditional execution path when this condition is met. Changes
Estimated code review effort🎯 3 (Moderate) | ⏱️ ~20 minutes 🚥 Pre-merge checks | ✅ 1 | ❌ 2❌ Failed checks (1 warning, 1 inconclusive)
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⚠️ Outside diff range comments (1)
tensorrt_llm/_torch/attention_backend/trtllm.py (1)
1-1:⚠️ Potential issue | 🟡 MinorAdd the NVIDIA copyright header for this source file.
This file now includes meaningful 2026 changes but still lacks the standard NVIDIA header at the top. Please add the repo-standard header and update the year to 2026.
As per coding guidelines, All TensorRT-LLM source files (.cpp, .h, .cu, .py, and other source files) should contain an NVIDIA copyright header with the year of latest meaningful modification.
🤖 Fix all issues with AI agents
In `@tensorrt_llm/_torch/attention_backend/trtllm.py`:
- Around line 1669-1678: The SM90 workaround unconditionally forces
use_paged_context_fmha = True, which overrides the prior MLA-specific disabling;
modify the condition so it only flips use_paged_context_fmha when SM90 and the
model is not MLA—e.g., change the if to check sm_major == 9 and NOT the MLA
branch that previously set use_paged_context_fmha False (the code that detects
MLA and sets use_paged_context_fmha), ensuring you reference the same MLA
detection/flag used earlier so MLA continues to have paged_context_fmha
disabled.
- Around line 1556-1565: The code currently hardcodes GPU 0 via
cuda.cuDeviceGet(0), assigns unused err, and uses non-snake-case cuDevice;
update the detection to query the current CUDA device (e.g., use
cuda.cuCtxGetDevice or equivalent to get the active device) and pass that device
to cuda.cuDeviceGetAttribute to compute sm_major, rename cuDevice to cu_device,
and remove the unused err variable; make the same replacement for the other
occurrence of this pattern (the block using cuDeviceGet/ cuDeviceGetAttribute
around sm_major detection later in the file) and keep the conditional logic that
forces use_paged_context_fmha when sm_major == 9.
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PR_Github #34471 [ run ] completed with state
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@PerkzZheng I am not sure whether it is a proper WAR, please see nvbug for more details. |
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@yuxianq I believe this should be a temporary workaround (though I still need @PerkzZheng to confirm if this is a reasonable one). @pengbowang-nv and I are working on rootcausing what is actually behind the accuracy problem regarding the |
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PR_Github #34563 [ run ] triggered by Bot. Commit: |
Signed-off-by: eopXD <yuehtingc@nvidia.com>
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PR_Github #34596 [ run ] triggered by Bot. Commit: |
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PR_Github #34596 [ run ] completed with state
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1 similar comment
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PR_Github #34725 [ run ] triggered by Bot. Commit: |
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PR_Github #34725 [ run ] completed with state |
… paged_context_fmha on Hopper for fmha_v2 (NVIDIA#11192) Signed-off-by: eopXD <yuehtingc@nvidia.com>
3 participants
Summary by CodeRabbit
Description
As topic, we currently have an accuracy issue on the prefill computation of the fmha_v2 kernels on Hopper. For now as a workaround we should enforce paged_context_fmha to ensure correctness of the inference.
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