[TRTLLM-10329][feat] Fix weight loading for Nemotron 3 models on DGX Spark

[pamelap-nvidia]

Summary by CodeRabbit

• Refactor
  • Optimized exponential calculations with in-place operations to reduce tensor allocations.
  • Added memory optimization for integrated GPU devices with CPU weight management.

Description

When loading Nemotron 3 models on DGX Spark, we see higher usage on host memory and this might lead to OOM even though the model fits well under the memory limit. This PR forces paging out weight tensors that have finished weight loading and helps keep memory usage low.

Test Coverage

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[coderabbitai]

📝 Walkthrough

Walkthrough

These changes include two separate optimizations: an in-place arithmetic transformation in a weight mapper to reduce memory temporaries, and a memory management feature in quantization that advises the operating system to drop host memory pages for unmapped CPU weights on integrated devices.

Changes

Cohort / File(s)	Summary
Arithmetic Optimization tensorrt_llm/_torch/models/checkpoints/hf/nemotron_h_weight_mapper.py	Replaced out-of-place negation of exponential (w = -torch.exp(w)) with in-place operations (w.exp_(); w.neg_()) after casting to float32 to reduce intermediate tensor allocations.
Memory Management Enhancement tensorrt_llm/_torch/modules/fused_moe/quantization.py	Added imports for is_device_integrated and advise_tensor_pageout; introduced helper function maybe_pageout_mmapped_cpu_weights() that drops host memory pages for unmapped CPU-contiguous weight tensors on integrated devices; integrated two new call sites after weight unmapping operations.

Estimated code review effort

🎯 2 (Simple) | ⏱️ ~15 minutes

🚥 Pre-merge checks | ✅ 1 | ❌ 2

❌ Failed checks (2 warnings)

Check name	Status	Explanation	Resolution
Description check	⚠️ Warning	The PR description explains the problem (host memory usage during Nemotron 3 weight loading on DGX Spark) and solution (paging out weight tensors), but the Test Coverage section is empty with only a placeholder comment.	Complete the Test Coverage section by clearly listing the relevant tests that safeguard these changes, including how weight loading behavior and memory usage are validated.
Docstring Coverage	⚠️ Warning	Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%.	Write docstrings for the functions missing them to satisfy the coverage threshold.

✅ Passed checks (1 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title clearly and specifically describes the main change: fixing weight loading for Nemotron 3 models on DGX Spark, matching the PR's core objective of addressing host memory usage issues.

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[coderabbitai]

Actionable comments posted: 1

🤖 Fix all issues with AI agents

In `@tensorrt_llm/_torch/modules/fused_moe/quantization.py`:
- Line 336: The MXFP4WeightCutlassFusedMoEMethod::load_expert_w3_w1_weight calls
load_weight_shard without a device, leaving the shard mmap'd on CPU and creating
a race with the non_blocking=True copy; update load_expert_w3_w1_weight to call
load_weight_shard(..., device=device) where device = dst_w3_w1_weight.device so
the H2D transfer is performed on the correct device before the non-blocking
copy, and keep the existing maybe_pageout_mmapped_cpu_weights(unmap_weights)
call intact to avoid page-out races.

[pamelap-nvidia]

/bot run --extra-stage "GB10-PyTorch-Post-Merge-1"

[tensorrt-cicd]

PR_Github #35410 [ run ] triggered by Bot. Commit: cafc4ad

[tensorrt-cicd]

PR_Github #35410 [ run ] completed with state FAILURE. Commit: cafc4ad
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[pamelap-nvidia]

/bot run --extra-stage "GB10-PyTorch-Post-Merge-1"

[tensorrt-cicd]

PR_Github #35537 [ run ] triggered by Bot. Commit: 6dad383

[tensorrt-cicd]

PR_Github #35537 [ run ] completed with state SUCCESS. Commit: 6dad383
/LLM/main/L0_MergeRequest_PR pipeline #27442 completed with status: 'FAILURE'

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[pamelap-nvidia]

/bot run --extra-stage "GB10-PyTorch-Post-Merge-1" --disable-fail-fast

[tensorrt-cicd]

PR_Github #35546 [ run ] triggered by Bot. Commit: d2d8e24

[tensorrt-cicd]

PR_Github #35546 [ run ] completed with state SUCCESS. Commit: d2d8e24
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[pamelap-nvidia]

/bot run --extra-stage "GB10-PyTorch-Post-Merge-1" --disable-fail-fast

[tensorrt-cicd]

PR_Github #35576 [ run ] triggered by Bot. Commit: d2d8e24

[tensorrt-cicd]

PR_Github #35576 [ run ] completed with state SUCCESS. Commit: d2d8e24
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/bot run --extra-stage "GB10-PyTorch-Post-Merge-1" --disable-fail-fast

[tensorrt-cicd]

PR_Github #35812 [ run ] triggered by Bot. Commit: cd5886a

[tensorrt-cicd]

PR_Github #35812 [ run ] completed with state SUCCESS. Commit: cd5886a
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[nv-guomingz]

LGTM

[pamelap-nvidia]

/bot run --extra-stage "GB10-PyTorch-Post-Merge-1" --disable-fail-fast

[tensorrt-cicd]

PR_Github #35856 [ run ] triggered by Bot. Commit: cd5886a

[tensorrt-cicd]

PR_Github #35856 [ run ] completed with state SUCCESS. Commit: cd5886a
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[pamelap-nvidia]

/bot run --extra-stage "GB10-PyTorch-Post-Merge-1" --disable-fail-fast

[tensorrt-cicd]

PR_Github #35928 [ run ] triggered by Bot. Commit: cd5886a

[tensorrt-cicd]

PR_Github #35928 [ run ] completed with state SUCCESS. Commit: cd5886a
/LLM/main/L0_MergeRequest_PR pipeline #27746 completed with status: 'SUCCESS'