RoarCAD is a local-first browser PCB workbench where people and AI agents operate the same versioned BoardGraph. It supports custom 1–10 layer boards, exact parts and pin maps, library or embedded footprints, nets, differential pairs, placement, checks, editable PCB and schematic views, engineering/fabrication exports, four page-bound WebMCP tools, and immutable team checkpoints.
- Production app
- Verified
devpreview - Public source
- Safe AI PCB design guide
- RoarCAD, Flux, and Quilter comparison
- Reproducible product evidence
The two-layer indicator proves the fabrication-ready path. The included eight-layer PocketRoar Capture Bridge proves the same generic compiler on a routed feasibility slice that has zero compiler/checker errors and exports a clearly marked engineering package. A third environmental-monitor sample proves that a new structured brief uses the same compiler without a project-name branch. PocketRoar remains incomplete and cannot request a quote until its full schematic, differential-pair, electrical, physical, licensing, and compatibility gates are proven.
The current product status, precise readiness vocabulary, retained research, and PocketRoar verification ladder are collected in the wrap-up checkpoint. The interface now pairs each general part type with a plain-English definition while keeping exact technical data visible.
Requires Bun.
bun install
bun run devQuality gates:
bun run typecheck
bun run check
bun test
bun run eval:webmcp
bun run build- Draft or import a structured custom
BoardGraphcontaining geometry, parts, footprints, pins, nets, and constraints. - Inspect requirements, exact MPNs, official evidence, and unresolved risks.
- Preview a structured change or explicitly unlock placement and drag a PCB component. The canvas is locked by default and a preview never mutates stored design state.
- A person approves and applies the preview in the visible UI to create an immutable revision.
- Validate the graph and generated Circuit JSON.
- Prepare engineering or fabrication Gerber, BOM, placement, validation, digital-verification, project, and hash-manifest artifacts.
- Explicitly download the package or request a JLCPCB quote.
Browsers without WebMCP retain the complete manual workflow. Agents cannot order, pay, store an address, or accept a substitution.
draft_boardinspect_designpreview_design_changevalidate_and_export
draft_board accepts requirements plus an optional structured design. inspect_design returns one focused, paginated section at a time. preview_design_change accepts allowlisted operations but cannot commit them. Supplier, agent, and shared-checkpoint evidence always enters unreviewed; only the visible manual UI can approve evidence, parts, footprints, or a pending change.
The complete structured schemas are exposed on the registered tools and are revalidated by Zod inside the application. Reproducible prompts for requirements-only, custom-board, change, export, and PocketRoar journeys are in sample prompts.
In Chrome, enable chrome://flags/#enable-webmcp-testing and relaunch before opening the hosted app. Unsupported browsers show Manual mode and retain the full workflow. Direct tool calls use the current Chrome contract: resolve the registered tool with await document.modelContext.getTools(), then call document.modelContext.executeTool(tool, JSON.stringify(input)).
Copy checkpoint link packages the current immutable revision and ancestry into a gzip-compressed URL fragment. The fragment is not sent to Vercel, but anyone who receives it can read the design. A .roarcad-checkpoint.json download is available as a portable fallback.
A recipient reviews the checkpoint before choosing Continue as local fork. They can make and human-approve changes, then share a new checkpoint back. The original author sees the common ancestor and semantic diff before choosing Adopt as new revision. Divergent PCB graphs are never auto-merged, checkpoint integrity does not prove sender identity, and all incoming review claims are reset to unreviewed.
The JLCPCB server boundary receives the current project and configuration, revalidates the revision, recompiles its artifacts, and rejects anything below fabrication-ready. It supports bare-PCB and PCBA configurations, server-side JLC signing, and expiring confirmed handoff tokens. Without an approved account-specific quote endpoint, it returns no invented price and directs the human to JLCPCB's upload flow.
Server variables:
JLCPCB_APP_ID
JLCPCB_ACCESS_KEY
JLCPCB_SECRET_KEY
JLCPCB_TOKENIZATION_PUBLIC_KEY
JLCPCB_TOKENIZATION_PRIVATE_KEY
JLCPCB_QUOTE_ENABLED=false
The tokenization keys remain unused unless an approved endpoint explicitly requires them. Protect /api/manufacturing/jlcpcb/quote with a Vercel WAF fixed-window rule of three requests per ten minutes per IP before enabling live quoting.
PocketRoar remains an engineering-only UVC bridge study. Its product target is iPhone, while USB-C iPad is the documented UVC comparison case. The routed feasibility slice has zero compiler/checker errors, but its eleven nets are not a complete schematic and its differential-pair impedance, coupling, and skew are not yet verified. The current graph also does not implement or prove the SeeMo-class compression and app-compatible iPhone transport that the product needs. The iPhone inspiration research, electrical completion brief, and verification ladder record the transport, connector, power, firmware, simulation, compliance, manufacturing, and physical-test gates that still block fabrication and quoting.
See the domain glossary, architecture, safety limits, sample prompts, demo script, and final video packet.
MIT © Jonathan Gan
