[3.9] bpo-46968: Fix faulthandler for Sapphire Rapids Xeon (GH-31789) #31831
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In Linux kernel 5.14 one can dynamically request size of altstacksize based on hardware capabilities with getauxval(AT_MINSIGSTKSZ). This changes allows for Python extension's request to Linux kernel to use AMX_TILE instruction set on Sapphire Rapids Xeon processor to succeed, unblocking use of the ISA in frameworks. Introduced HAVE_LINUX_AUXVEC_H in configure.ac and pyconfig.h.in Used cpython_autoconf:269 docker container to generate configure. (cherry picked from commit 3b128c0)
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…pythonGH-31831) In Linux kernel 5.14 one can dynamically request size of altstacksize based on hardware capabilities with getauxval(AT_MINSIGSTKSZ). This changes allows for Python extension's request to Linux kernel to use AMX_TILE instruction set on Sapphire Rapids Xeon processor to succeed, unblocking use of the ISA in frameworks. Introduced HAVE_LINUX_AUXVEC_H in configure.ac and pyconfig.h.in Used cpython_autoconf:269 docker container to generate configure. (cherry picked from commit 3b128c0) Co-authored-by: Oleksandr Pavlyk <[email protected]>
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In Linux kernel 5.14 one can dynamically request size of altstacksize
based on hardware capabilities with getauxval(AT_MINSIGSTKSZ).
This changes allows for Python extension's request to Linux kernel
to use AMX_TILE instruction set on Sapphire Rapids Xeon processor
to succeed, unblocking use of the ISA in frameworks.
Introduced HAVE_LINUX_AUXVEC_H in configure.ac and pyconfig.h.in
Used cpython_autoconf:269 docker container to generate configure.
(cherry picked from commit 3b128c0)
https://bugs.python.org/issue46968