feat: extract_layout implementation for native Poseidon2#1813
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CodSpeed WallTime Performance ReportMerging #1813 will not alter performanceComparing
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Commit: 5c9157f |
arayikhalatyan
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I believe this idea should work, and even makes it much easer to do parallel tracegen over rows on GPU.
Note, this is different from other chips in the sense that we will 'decode' the records from buffer differently from how they were 'allocated'. During execution we allocate 1 record (aka NativePoseidon2RecordMut) per instruction but in buffer decoding during tracegen we will treat it as 1 record (aka &mut NativePoseidon2Cols) per row
Resolves INT-4288.
Discussed with @arayikhalatyan, for trace generation purposes we can actually treat native Poseidon2 as if it uses fixed-size records. This simplifies the GPU tracegen and allows us to not send any auxiliary information to the GPU device.