1. X
  2. Semiconductor Engineering
Log inSign up
Semiconductor Engineering
7,136 posts
Semiconductor Engineering profile banner
user avatar

Semiconductor Engineering

@SemiEngineering
Deep Insights For The Tech Industry #semiconductor #semiEDA #AI #embedded #verification #lowpower #test #DataAnalytics #automotive #chipdesign #ICmanufacturing
Silicon Valley
semiengineering.com
Joined September 2013
3,904
Following
17.5K
Followers
RepliesRepliesMediaMedia
  • Engineering
    user avatar
    Semiconductor Engineering
    @SemiEngineering
    Aug 14
    Latest: Lam Research, ASE expansions; data center shifts; CPO system architecture initiative; HW security; patent suits; image sensors; programmable AI memtransistor; Nvidia’s new plan; earnings ... semiengineering.com/chip-industry-… #semiconductor
    Image
    Chip Industry Week In Review
    From semiengineering.com
  • Engineering
    user avatar
    Semiconductor Engineering
    @SemiEngineering
    Aug 13
    Data-center network fabrics are undergoing another architectural shift as optical interconnects assume a larger role in AI-cluster connectivity, extending into scale-up domains & influencing overall topology design semiengineering.com/coppers-grip-o… #datacenters #optics #OCS #WDM
    Image
  • Electronics Engineering
    user avatar
    Semiconductor Engineering
    @SemiEngineering
    Aug 12
    CPO is taking off as AI data centers leverage every possible option for improving performance & reducing power, but moving from lab instrumentation to production ATEs on a factory floor is struggling to keep pace with demand. semiengineering.com/cpo-test-wont-… #CPO #photonics #datacenters
    Image
  • Semiconductor & VLSI
    user avatar
    Semiconductor Engineering
    @SemiEngineering
    Aug 11
    Special Report: High-bandwidth memory has become a proving ground for 3D stack testing, DFT, and reliability. semiengineering.com/hbm-becomes-te… #HBM #DRAM #semiconductor #DFT
    Image
    HBM Becomes Testbed For 3D Assembly Yield
    From semiengineering.com
  • Semiconductor & VLSI
    user avatar
    Semiconductor Engineering
    @SemiEngineering
    Aug 10
    Semiconductor leaders say HW trust, verification, and lifecycle resilience must become core design requirements rather than late-stage additions. semiengineering.com/the-next-big-c… #chipsecurity #hardwaresecurity #cybersecurity #semiEDA #semiconductor
    Image
    The Next Big Chip Failure May Be A Security One
    From semiengineering.com

Log in or sign up for X

See what’s happening and join the conversation

Continue with phone
or
Log in with username or email
Terms·Privacy·Cookies·Accessibility·Ads Info·© 2026 X Corp.
Advertisement
Advertisement