While I still numerologically hope Twitter makes it to July so it's a round 15 years since I signed up, if you're sensibly setting up alternatives you can also find me at @[email protected] or cohost.org/agg.
Adam Greig
@adamgreig
馃殌; also electronics, RF, signal processing & comms, embedded and scientific software, FPGAs, Rust. He/him. 馃 @agg.io
- ecpdap (ECP5 FPGA programmer, crates.io/ecpdap) 0.2 now out, with live patching bitstreams to fix compatible IDCODEs, which is great when stock shortages means you have a whole mix of compatible ECP5s and don't want to manage a ton of bitstream variants!
- A few weeks ago someone on the embedded Rust chat commented that their build times seemed to have gotten better, and sure, each release brings some nice gains, but I hadn't noticed just how dramatic some of the improvements have been...
- I've just released spidap, a followup to ecpdap, which allows accessing SPI flash directly from a CMSIS-DAP probe in JTAG mode (JTAG looks like SPI if you squint), handy for iCE40 boards (and anything else with SPI flash...) crates.io/crates/spidap
- finally got around to automating "hmm, it only *just* failed timing, what if I try 20 more seeds in nextpnr, one after the other, by hand?"
