Establish a baseline `ports/zephyr` that works for every Zephyr board. Include: - [x] Fixed implementations of I2C, UART and SPI that are linked into `board`. - [x] Flexible `digitalio` that uses the Zephyr API. - [x] Default CIRCUITPY storage. - [x] `west build` support that uses async Python to build the CircuitPython bits.
Establish a baseline
ports/zephyrthat works for every Zephyr board.Include:
board.digitaliothat uses the Zephyr API.west buildsupport that uses async Python to build the CircuitPython bits.