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ESP-IDF targets' Atomic*64 is not lock-free #117305
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A-atomicArea: Atomics, barriers, and sync primitivesArea: Atomics, barriers, and sync primitivesC-bugCategory: This is a bug.Category: This is a bug.I-unsoundIssue: A soundness hole (worst kind of bug), see: https://en.wikipedia.org/wiki/SoundnessIssue: A soundness hole (worst kind of bug), see: https://en.wikipedia.org/wiki/SoundnessP-lowLow priorityLow priorityT-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.
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A-atomicArea: Atomics, barriers, and sync primitivesArea: Atomics, barriers, and sync primitivesC-bugCategory: This is a bug.Category: This is a bug.I-unsoundIssue: A soundness hole (worst kind of bug), see: https://en.wikipedia.org/wiki/SoundnessIssue: A soundness hole (worst kind of bug), see: https://en.wikipedia.org/wiki/SoundnessP-lowLow priorityLow priorityT-compilerRelevant to the compiler team, which will review and decide on the PR/issue.Relevant to the compiler team, which will review and decide on the PR/issue.
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max_atomic_width of these targets is currently set to 64
rust/compiler/rustc_target/src/spec/riscv32imac_esp_espidf.rs
Line 20 in 0237aa3
rust/compiler/rustc_target/src/spec/riscv32imc_esp_espidf.rs
Line 23 in 0237aa3
However, as mentioned in #115577 (comment), esp-idf's 64-bit atomic builtins use global spinlocks on multi-core systems:
https://github.com/espressif/esp-idf/blob/3b748a6cb76c2db7c6368a0dea32a88bc58bc44d/components/newlib/stdatomic.c#L64
And it violates what the standard library is intended to guarantee.
https://doc.rust-lang.org/nightly/std/sync/atomic/index.html#portability
Since riscv32 does not have 64-bit atomic instructions, I do not believe there is any way to fix this problem other than setting max_atomic_width of these targets to 32.
cc @ivmarkov @MabezDev (mentioned because you both are target maintainers)
@rustbot label +A-atomic +I-unsound