feat(gust): on-silicon DWT cycle TCB for two boards — G474RE (M4) + STM32F100 (M3) - #103
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…M4) + STM32F100 (M3)
silicon_bench: one bare-metal TCB measuring true hardware cycles (DWT CYCCNT, not
qemu -icount) for native (LLVM) vs dissolved (synth) gust_mix, on BOTH PulseEngine
silicon targets. The board only changes the memory map, target triple, and the
dissolved object; the DWT counter is identical on M3/M4 so the numbers compare
directly.
- src/bin/silicon_bench.rs — enables DWT, correctness-gates [0,2047], times
native vs dissolved, semihosting output. Runs on M3 + M4 (and qemu as a
self-check; qemu's lm3s model reports 0 cycles — DWT unimplemented there).
- silicon/{memory-g474re.x,memory-f100.x} — per-board maps (G474RE: flash
0x08000000/512K, RAM 96K; F100: 128K/8K).
- silicon/run.sh {g474re|f100} — swaps the map, builds the right target, flashes +
captures via probe-rs. GUST_MIX_O overrides the object for the fusion comparison.
- silicon/README.md — the two-board table + the run/compare recipe.
Two gotchas found + fixed (both silently produced an empty ELF):
1. a synth --target cortex-m3 .o does NOT link into a thumbv7em (M4) image —
ARMv7-M attributes; the G474RE needs a --target cortex-m4 object
(gust_mix-cm4.o, added). build.rs selects by cargo TARGET. (The cortex-m4
object is also the right artifact for the M4-vs-LLVM comparison, synth#428.)
2. .cargo/config.toml had -Tlink.x only for thumbv7m; added the thumbv7em target.
Gives the synth#428 precondition-#2 (G474RE DWT) path now and the F100 number when
the board arrives. Existing qemu benches unaffected.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Codecov Report✅ All modified and coverable lines are covered by tests. 📢 Thoughts on this report? Let us know! |
…n M4 silicon, correctness identical (synth#428 precond-2) Flashed silicon_bench on the physical NUCLEO-G474RE via probe-rs (STLink V3). gust_mix native (LLVM thumbv7em) vs dissolved (synth cortex-m4), real DWT cycles, correctness bit-identical [0,2047] in both states: flag-off : native 29.0 / dissolved 64.0 cyc → 2.21× SYNTH_CMP_SELECT_FUSE: native 29.0 / dissolved 58.0 cyc → 2.00× The cmp→select fusion is a measured -6 cyc (-9%) on-M4 win, correctness preserved → synth#428 precondition-2 (G474RE DWT no-regression) satisfied. F100 pending board. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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Prep for testing the dissolved gale code on both silicon targets: the NUCLEO-G474RE (Cortex-M4, on hand now) and the incoming STM32VLDISCOVERY / STM32F100 (Cortex-M3). Two MCUs → the TCB must be board-parameterized.
silicon_benchis one bare-metal TCB measuring true hardware cycles (DWT CYCCNT, not qemu-icount) for native (LLVM→thumb) vs dissolved (synth)gust_mix. Only the memory map + target + dissolved object change per board; the DWT counter is identical on M3/M4 so the two boards' numbers compare directly..ogust_mix-cm4.oSTM32G474RETxgust_mix-cm3.oSTM32F100RBTxTwo gotchas found + fixed (both silently emitted an empty ELF)
synth --target cortex-m3object does not link into a thumbv7em (M4) image — its ARMv7-M build attributes makerust-llddrop everything. The G474RE needs a--target cortex-m4object (gust_mix-cm4.o, added);build.rspicks by cargoTARGET. This object is also the correct one for the M4-vs-LLVM-thumbv7em comparison (synth#428)..cargo/config.tomlonly set-Tlink.xfor thumbv7m; added the thumbv7em target.Validated: both boards build correctly (G474RE
.text5256 +gust_mix/mainpresent; F100 text 5268), the harness self-checks on qemu (correctness IDENTICAL; qemu reports 0 cycles — DWT unimplemented in its lm3s model). Existing qemu benches unaffected.This gives the synth#428 precondition-#2 path (G474RE DWT on-silicon, the cmp→select fusion no-regression) now, and the F100 cycle number when the board arrives — via
GUST_MIX_O=<flag-on .o> silicon/run.sh g474reto compare flag-off vs flag-on on real M4.🤖 Generated with Claude Code