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feat(gust): cross-arch matrix — one wasm lowers to ARM and RISC-V with the seam intact - #233

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Jul 29, 2026
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feat(gust): cross-arch matrix — one wasm lowers to ARM and RISC-V with the seam intact#233
avrabe merged 1 commit into
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feat/cross-arch-matrix

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@avrabe avrabe commented Jul 29, 2026

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Moves the biggest item off the Research Day cut's WON'T list.

What changed

Until this morning, no thin-seam driver crossed to RISC-V: synth's RV32 backend declined every function containing an imported call. That was filed as synth#871 and fixed the same day in synth 0.52.0 (auipc/jalr + R_RISCV_CALL_PLT into .rela.text).

Re-measured on our actual drivers:

driver ARM cortex-m3 RISC-V rv32imc
wdg-thin 6 T, 2 U, 638 B 5 T, 2 U — 1 of 6 skipped
gpio-thin 5 T, 2 U, 502 B 5 T, 2 U — complete
i2c-thin 7 T, 2 U, 954 B 6 T, 2 U — 1 of 7 skipped
timer-thin 5 T, 2 U, 204 B 5 T, 2 U — complete
adc-thin 8 T, 2 U, 736 B 8 T, 2 U — complete
dac-thin 8 T, 2 U, 642 B 8 T, 2 U — complete
pwm-thin 6 T, 1 U, 694 B 6 T, 1 U — complete
uart-thin 4 T, 3 U, 254 B 4 T, 3 U — complete

Six of eight lower completely on both, same function count, same seam width. Deterministic.

The gate is the undefined-symbol count, not size

Under 0.49, wdg-thin lowered to a 468 B RV32 object with 2 defined functions and zero undefined symbols — smaller than the ARM object, and hollow: every gust:hal call had been silently dropped. So build-cross-arch.sh fails if either object has no undefined seam symbols. A smaller object is exactly what the failure looks like.

Honest boundary (in the doc, not just here)

  • RISC-V objects are compiled and seam-correct, not executed — and could not meaningfully be: these carry STM32 register maps, so a faithful RV32 silicon result needs an RV32 target model that does not exist yet.
  • ARM remains the only executed leg, on two dies.
  • gust_mix already has real ESP32-C3 silicon numbers (1.839x). That is execution evidence; this table is lowering evidence. Different claims, kept apart.
  • Two functions still decline, reported as synth#882.

Also measured

0.52.0 shrank every ARM object, no regressions — −122 B across the suite, including gpio-thin 534 → 502 B (relevant to synth#846). This PR does not re-pin the toolchain; the committed .o files stay on 0.49 pending a silicon re-run.

🤖 Generated with Claude Code

https://claude.ai/code/session_011QG86sovTbfnPNY9SfhSmo

…h the seam intact

The thin-seam drivers are written once and lowered from the same wasm to both Cortex-M
and RV32. Six of eight now cross completely, with the same defined-function count and
the same seam width on each target; deterministic across runs.

This was impossible until today. synth#871 — filed from this repo this morning, after
the RV32 backend was found to decline every seam-importing function — was fixed the
same day in synth 0.52.0 (auipc/jalr + R_RISCV_CALL_PLT into .rela.text).

The gate is the undefined-symbol count, not the byte count, and that is deliberate.
Under 0.49 the RISC-V backend silently dropped functions containing imported calls, so
wdg-thin emitted a *smaller* object with no undefined symbols at all. Smaller and
hollow. An object whose gust:hal calls have vanished has not been ported. So
build-cross-arch.sh fails if either object has zero undefined seam symbols.

Boundary stated in the doc: the RISC-V objects are compiled and seam-correct but NOT
executed, and could not meaningfully be — these carry STM32 register maps, so a
faithful RV32 silicon result needs an RV32 target model that does not exist yet. ARM
remains the only executed leg (two dies). Import-free gust_mix already has real
ESP32-C3 numbers; that is execution evidence, this is lowering evidence, and they are
different claims.

Two functions still decline (synth#882): wdg_unlock on an unsupported BrTable, and
i2c_step on an undefined label, which reads like an emit defect rather than a gap.

Co-Authored-By: Claude <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_011QG86sovTbfnPNY9SfhSmo
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Codecov Report

✅ All modified and coverable lines are covered by tests.

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@avrabe
avrabe merged commit 6ffa26c into main Jul 29, 2026
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@avrabe
avrabe deleted the feat/cross-arch-matrix branch July 29, 2026 16:34
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