arm: functions needing the AAPCS stack-arg path (>8 scalar params, or any 64-bit stack param) are skipped, not lowered

[avrabe]

Summary

On the arm backend, synth compile skips (emits no code for) any function whose call signature needs the AAPCS stack-argument path — i.e. more than 8 scalar params, or any 64-bit (i64/f64) param that would land on the stack. The function is dropped from the ELF rather than lowered. This is a completeness gap on the road to self-contained firmware (and to the #494 0.7× goal): every reachable function must lower.

Verified on synth v0.15.1 (released aarch64-apple-darwin binary).

Minimal repro

sum10.wat — 10 i32 params:

(module
  (func (export "sum10") (param i32 i32 i32 i32 i32 i32 i32 i32 i32 i32) (result i32)
    local.get 0 local.get 1 i32.add local.get 2 i32.add local.get 3 i32.add
    local.get 4 i32.add local.get 5 i32.add local.get 6 i32.add local.get 7 i32.add
    local.get 8 i32.add local.get 9 i32.add))

$ synth compile sum10.wat -t cortex-m3 --cortex-m -o /tmp/r.elf
warning: skipping function 'sum10': backend 'arm' failed: ... Synthesis failed:
  #359: function has 10 params; the AAPCS stack-argument path supports at most 8 scalar params
Error: no functions compiled successfully (1 skipped) — nothing to emit

mix.wat — 5 params, one i64 on the stack:

(module
  (func (export "mix") (param i32 i32 i32 i32 i64) (result i64)
    local.get 4 local.get 0 i64.extend_i32_u i64.add))

warning: skipping function 'mix': ... Synthesis failed:
  #359: function has 5 params including a 64-bit (i64/f64) param; the AAPCS stack-argument path supports only i32 params

Control: the same shape with 8 i32 params compiles cleanly and emits an ELF.

Impact (real workload)

Compiling the falcon flight component (falcon-flight-v1.94 → meld-fused → loom-optimized → synth compile -t cortex-m3), 3 of the 29 skipped functions fail on exactly this: func_57 (10 params), func_58 (25 params), func_163 (5 params incl. a 64-bit). These survive meld/loom as legitimate lowered helpers; the arm backend just can't pass their args. (The other 26 skips are the known float #369 (23) and register-exhaustion (3) buckets — tracked separately.)

Two asks

1. Lower these per AAPCS — r0–r3 for the first 4 words, the rest spilled to the stack (with 8-byte alignment for 64-bit params), and the i64/f64 stack-passing case. This unblocks 3 falcon functions today and is on the critical path for self-contained firmware + #494.
2. Fix the diagnostic label — the warning cites #359, which is closed and about a different bug (sret first-arg shift). There's no open issue for the stack-arg-path limitation itself; this is it.

[avrabe]

The >8-scalar-i32 case is fixed and released in v0.16.0 (PR #504 → 8e917a2, release 4a6b1ef, tag v0.16.0).

The arm direct selector (select_with_stack, the shipped --relocatable path) now lowers functions with >8 scalar i32 params, and calls passing >8 i32 args, by leaning on the already-generic incoming/outgoing stack-arg machinery + the existing 12-bit [sp,#imm] guards (verified to fire as a clean skip, never a silent miscompile). Existing output is bit-identical (frozen byte gate unchanged). Validated by stack-args-503-oracle: sum10, sum25 (reading param 24), a 10-arg outgoing call, and a combined incoming+outgoing function — all execute bit-identically to wasmtime.

This unblocks 2 of the 3 falcon helpers named in the report: func_57 (10 params) and func_58 (25 params).

Keeping this issue open for the remaining piece: func_163 (5 params incl. a 64-bit) still skips — the 64-bit stack-param lowering (AAPCS pair-alignment + back-fill + 8-byte slots) is the follow-up. Its diagnostic now correctly cites #503, not the closed #359.

Heads-up for the falcon build on v0.16.0: expect 2 fewer skips (func_57/58 now lower); func_163 will still skip with the #503 64-bit message until the follow-up lands.

[avrabe]

Verified v0.16.0 (built from source at 4a6b1ef, synth 0.16.0) against the falcon workload. The fix is correct in isolation — but a heads-up: it unblocks 0 of the 3 named falcon helpers, not 2, because all three turn out to carry i64, not pure-i32 overflow. The earlier "10 params / 25 params" labels were the >8-scalar check tripping first and masking the real signature; now that the i32 path lowers, the compiler reaches the true blocker on each.

Re-ran falcon-flight-v1.94 → meld → loom v1.1.16 → synth 0.16.0 -t cortex-m3: still 29 / 145 skipped (unchanged from 0.15.1). The three, with their actual wasm signatures:

fn	signature	0.15.1	0.16.0
func_57	(i32 i32 i32 i32 i32 i32 i64 i64 i64)	#359: 10 params, >8 scalar	#503: ...incl. a 64-bit param ... only i32 stack params
func_163	(i32 i64 i64 i64 i64)	#359: incl. 64-bit	#503: ...incl. a 64-bit param ... only i32 stack params
func_58	(i32 i32 i32 …) + i64	#359: 25 params, >8 scalar	i64 register pair: no high register available for R8 (last in ALLOCATABLE_REGS)

So:

• func_57 + func_163 land in the 64-bit-stack-param follow-up you're keeping arm: functions needing the AAPCS stack-arg path (>8 scalar params, or any 64-bit stack param) are skipped, not lowered #503 open for. Good — diagnostic now cites arm: functions needing the AAPCS stack-arg path (>8 scalar params, or any 64-bit stack param) are skipped, not lowered #503 correctly.
• func_58 is a different wall: it gets past arg-passing and dies in i64-register-pair allocation (no high reg for the R8 pair). That looks like Epic: reach and beat native codegen — proof-carrying specialization as the mechanism (VCR-*) #242 territory rather than the stack-arg path — flagging in case you want to route it there.

Net: v0.16.0's standalone >8-i32 capability is confirmed (your sum10/sum25 oracle), but the falcon skip count needs the 64-bit-stack-param piece (+ the i64-pair allocation fix) before it moves. Reproducible via jess tools/bench/chain-measure.sh. Thanks for the fast turnaround.