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SystemZ Backend: Add support for operations such as FP16_TO_FP and FP_TO_FP16 #50374
Other test cases such as //tensorflow/python/keras/optimizer_v2:adam_test and //tensorflow/core/kernels/mlir_generated:abs_cpu_f16_f16_gen_test also fail on s390x due to similar reasons. A related issue (tensorflow/tensorflow#44362) has been raised in TensorFlow GitHub issues.
We think the root cause is lack of support for operations such as FP16_TO_FP and FP_TO_FP16 which perform promotions and truncation for half-precision (16 bit) floating numbers in the SystemZ LLVM backend (llvm/lib/Target/SystemZ/SystemZISelLowering.cpp). Could these features be considered to add to SystemZ LLVM backend? Thanks!
It looks like commit https://reviews.llvm.org/rG8cd8120a7b5d which has been tagged as 13.0.0-rc could solve this issue, since it adds support for arch14 and operations related to FP16 conversion to the SystemZ backend. Could anyone from community help to confirm this? Thanks!
This issue still persists on TensorFlow v2.8.0 which uses LLVM 15. Looks like specific half-precision (16 bit) operations are still missing in SystemZ LLVM backend.
Can anyone from community take a look at this issue? Thanks very much!
Recently we've run test cases under //tensorflow/core/kernels/mlir_generated category in TensorFlow v2.9.1 and found that this issue still exists.
Looks like FP16/F16 related operations are still unsupported in LLVM SystemZ backend for most Z cpu models, which causes these test cases (such as abs_cpu_f16_f16_gen_test and sqrt_cpu_f64_f64_gen_test) to fail when applyFullConversion() or applyPartialConversion() function is invoked. Although this commit has added FP16 support in the new arch14 (z16) model, it seems that arch14 still doesn't have full support for FP16 operations.
We also found that when building TensorFlow with options -c opt --copt=-O which sets optimization level to 1 and with JIT_Compilation enabled, these test cases would pass and the output .mlir files could be generated successfully.
We think this could be used as a workaround for now, but to address the root cause, FP16 related operations still need to be added to SystemZ backend.
Any thoughts or suggestions from the community reg this issue would be greatly appreciated. Thanks!
Activity
kun-lu20 commentedon Sep 21, 2021
Any updates from the community reg this issue? Thanks!
joker-eph commentedon Sep 21, 2021
Moving out of MLIR: this is a backend issue.
kun-lu20 commentedon Oct 8, 2021
It looks like commit https://reviews.llvm.org/rG8cd8120a7b5d which has been tagged as 13.0.0-rc could solve this issue, since it adds support for arch14 and operations related to FP16 conversion to the SystemZ backend. Could anyone from community help to confirm this? Thanks!
kun-lu20 commentedon Apr 7, 2022
This issue still persists on TensorFlow v2.8.0 which uses LLVM 15. Looks like specific half-precision (16 bit) operations are still missing in SystemZ LLVM backend.
Can anyone from community take a look at this issue? Thanks very much!
kun-lu20 commentedon Jul 6, 2022
Recently we've run test cases under
//tensorflow/core/kernels/mlir_generatedcategory in TensorFlow v2.9.1 and found that this issue still exists.Looks like
FP16/F16related operations are still unsupported in LLVM SystemZ backend for most Z cpu models, which causes these test cases (such asabs_cpu_f16_f16_gen_testandsqrt_cpu_f64_f64_gen_test) to fail whenapplyFullConversion()orapplyPartialConversion()function is invoked. Although this commit has addedFP16support in the new arch14 (z16) model, it seems that arch14 still doesn't have full support forFP16operations.We also found that when building TensorFlow with options
-c opt --copt=-Owhich sets optimization level to 1 and withJIT_Compilationenabled, these test cases would pass and the output .mlir files could be generated successfully.We think this could be used as a workaround for now, but to address the root cause,
FP16related operations still need to be added to SystemZ backend.Any thoughts or suggestions from the community reg this issue would be greatly appreciated. Thanks!
beetrees commentedon Jun 13, 2024
The following function (compiler explorer):
currently fails to compile when compiling for
s390x-unknown-linux-gnuwith the following error:Other operations involving
halfalso fail with similar errors.alexrp commentedon Jun 28, 2024
FWIW, this is the only remaining blocker I'm aware of for Zig to be able to target s390x:
core: Limit remaining f16 doctests to x86_64 linux
Rollup merge of rust-lang#127588 - uweigand:s390x-f16-doctests, r=tgr…
Unrolled build for rust-lang#127588
llvm: Disable lowering to f16 on s390x.
JonPsson1 commentedon Oct 7, 2024
Patch in progress here: #109164
[SystemZ] Add support for 16-bit floating point. (llvm#109164)
`f16`: remove s390x fixme