test: Add sanitizer suppressions for AMD EPYC CPUs - #20844
Conversation
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I think the unsigned integer overflow check is questionable in the first place. After all, unsigned integer overflow isn't UB and completely normal in cryptography and other bit manipulation code. Anyhow ACK fa6c114 |
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Post-merge ACK fa6c114: a general Thanks for fixing this @MarcoFalke!
In fairness it is probably worth mentioning that the goal of the UBSan's The idea is instead to make reliance on wraparound semantics explicit by documenting in which areas of our code code we expect unsigned integer wraparounds to occur (such as in UBSan can then flag all wraparounds outside of the expected areas: such cases are are likely unintentional (bugs). Also, it should be noted that the list of |
Currently the ci system only runs on intel cpus (and some arm devices), but it won't run on CPUs
Using the 'shani(1way,2way)' SHA256 implementation(excerpt from debug log).For reference, google cloud CPUs (which is what Cirrus CI uses) print
Using the 'sse4(1way),sse41(4way),avx2(8way)' SHA256 implementationThe traceback I got: