Portfolio • Email • LinkedIn • GitHub
I design, build, and validate embedded systems that connect firmware, sensors, real-time control, and hardware. My work focuses on low-level drivers, RTOS task pipelines, communication protocols, PCB bring-up, and hardware/software integration under tight timing and memory constraints.
- Embedded firmware in C and C++ for microcontrollers
- Bare-metal firmware, memory optimization, and peripheral bring-up
- FreeRTOS task design, scheduling, and real-time data pipelines
- Sensor drivers and biosensor data acquisition systems
- Communication over BLE, Wi-Fi, UART, I2C, SPI, CAN, and TCP/IP
- Embedded UI development using LVGL
- Hardware bring-up, oscilloscope debugging, logic analyzer validation, and PCB testing
- RTL design in Verilog for digital systems and packet parsing
I’m actively exploring edge computing for real-time perception and control, with a focus on running vision workloads close to the hardware to reduce latency and avoid cloud dependencies.
My recent work includes building an edge AI assistant on a Raspberry Pi 5 with a Hailo-8L accelerator, using YOLOv8 and OpenCV for real-time object detection, medication verification, and persistent object memory. I’m interested in how embedded Linux systems, AI accelerators, and microcontroller firmware can work together in systems that sense, decide, and actuate in real time.
This connects directly with the kind of embedded systems I like building: real hardware, real constraints, and real testing.
Detailed project write-ups, system diagrams, images, and demo videos are available on my portfolio site: https://jonathankoshy.netlify.app
Featured work includes:
- AI Dementia Companion — Raspberry Pi 5, Hailo-8L, YOLOv8, OpenCV, TypeScript
- High Speed Autonomous Disk Launcher — Raspberry Pi 5, ESP32-S3, OpenCV, PID control, LiDAR
- ESP32 Wi-Fi Media Controller — ESP32, LVGL, Wi-Fi, Spotify API, embedded touchscreen UI
- RISC-V Interrupt Driven Embedded Controller — SiFive FE310, RISC-V assembly, GPIO interrupts
- ASIC Ethernet Parser — Verilog, Ethernet frame parsing, ARP validation, hardware packet processing
I’m open to collaborating on embedded systems, robotics, firmware, edge AI, and hardware/software projects involving real devices, real constraints, and real testing.
Email: jjacobko@uwaterloo.ca Portfolio: https://jonathankoshy.com Location: Canada
