[None][infra] Add DSR1 DSV32 K2 Disagg Perf Tests Back#12688

chenfeiz0326 · 2026-04-02T10:36:55Z

Summary by CodeRabbit

Tests
- Enhanced GB200 multi-node performance testing coverage with updated stage configurations
- Activated testing for GB200 models with additional precision and configuration combinations

Description

Test Coverage

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chenfeiz0326 · 2026-04-02T10:38:07Z

/bot run --disable-fail-fast --stage-list "GB200-24_GPUs-6_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE4-GPU16-Post-Merge-1,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-4,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-5,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-6,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-7,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-8"

coderabbitai · 2026-04-02T10:39:44Z

📝 Walkthrough

Walkthrough

Modified Jenkins pipeline job configuration by updating a stage parameter and adding a new multi-node performance test stage. Simultaneously uncommented previously disabled test cases in a test list file to enable them for execution.

Changes

Cohort / File(s)	Summary
Jenkins Job Configuration `jenkins/L0_Test.groovy`	Updated `splitId` parameter from `3` to `8` for GB200 12-GPU 3-node PyTorch Disagg PerfSanity job. Added new SBSA multi-node perf stage configuration for GB200 24-GPU 6-node setup with disaggregation parameters.
Test List `tests/integration/test_lists/test-db/l0_gb200_multi_nodes_perf_sanity_ctx1_node1_gpu4_gen1_node2_gpu8.yml`	Enabled 5 previously commented-out perf sanity test entries covering `gb200_deepseek-v32` and `gb200_kimi-k2-thinking` models with various quantization and configuration combinations. Removed associated failure annotations.

Estimated code review effort

🎯 2 (Simple) | ⏱️ ~12 minutes

🚥 Pre-merge checks | ✅ 2 | ❌ 1

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Description check	⚠️ Warning	The PR description contains only the template with unfilled sections (Description and Test Coverage are empty); no actual implementation details, rationale, or test coverage information is provided.	Fill in the Description section explaining why these tests are being re-enabled and the Test Coverage section listing which tests now cover the changes.

✅ Passed checks (2 passed)

Check name	Status	Explanation
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Title check	✅ Passed	The title clearly summarizes the main change: adding back disaggregated performance tests for DSV32 models to the CI infrastructure.

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tensorrt-cicd · 2026-04-02T10:44:26Z

PR_Github #41418 [ run ] triggered by Bot. Commit: 298cf3d Link to invocation

tensorrt-cicd · 2026-04-02T12:42:53Z

PR_Github #41418 [ run ] completed with state SUCCESS. Commit: 298cf3d
/LLM/main/L0_MergeRequest_PR pipeline #32353 (Partly Tested) completed with status: 'SUCCESS'

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chenfeiz0326 · 2026-04-03T12:43:23Z

/bot run --disable-fail-fast --stage-list "GB200-24_GPUs-6_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE4-GPU16-Post-Merge-1,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-4,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-5,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-6,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-7,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-8"

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PR_Github #41665 [ run ] triggered by Bot. Commit: 298cf3d Link to invocation

tensorrt-cicd · 2026-04-03T16:10:19Z

PR_Github #41665 [ run ] completed with state SUCCESS. Commit: 298cf3d
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chenfeiz0326 · 2026-04-04T12:25:15Z

/bot run --disable-fail-fast --stage-list "GB200-24_GPUs-6_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE4-GPU16-Post-Merge-1,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-4,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-5,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-6,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-7,GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-8"

tensorrt-cicd · 2026-04-04T12:31:55Z

PR_Github #41824 [ run ] triggered by Bot. Commit: 298cf3d Link to invocation

tensorrt-cicd · 2026-04-04T12:31:56Z

PR_Github #41824 [ run ] completed with state DISABLED
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chenfeiz0326 · 2026-04-05T06:01:17Z

/bot run --disable-fail-fast --stage-list "GB200-20_GPUs-5_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE4-GPU16-Post-Merge-1,GB200-20_GPUs-5_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE4-GPU16-Post-Merge-2,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-1,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-2,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-3,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-4,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-5,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-6,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-7,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-8,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-9,GB200-40_GPUs-10_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE8-GPU32-Post-Merge-1"

tensorrt-cicd · 2026-04-05T06:06:01Z

PR_Github #41853 [ run ] triggered by Bot. Commit: 09d79e5 Link to invocation

tensorrt-cicd · 2026-04-05T06:06:35Z

PR_Github #41854 [ run ] triggered by Bot. Commit: 09d79e5 Link to invocation

tensorrt-cicd · 2026-04-05T06:06:37Z

PR_Github #41853 [ run ] completed with state ABORTED. Commit: 09d79e5

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tensorrt-cicd · 2026-04-05T09:01:34Z

PR_Github #41854 [ run ] completed with state SUCCESS. Commit: 09d79e5
/LLM/main/L0_MergeRequest_PR pipeline #32722 (Partly Tested) completed with status: 'FAILURE'

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chenfeiz0326 · 2026-04-07T04:02:21Z

/bot run --disable-fail-fast --stage-list "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-5,GB200-24_GPUs-6_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE4-GPU16-Post-Merge-1,GB200-20_GPUs-5_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE4-GPU16-Post-Merge-2,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-4,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-5,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-8,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-9,GB200-40_GPUs-10_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE8-GPU32-Post-Merge-1"

tensorrt-cicd · 2026-04-07T04:08:42Z

PR_Github #42058 [ run ] triggered by Bot. Commit: 09d79e5 Link to invocation

tensorrt-cicd · 2026-04-07T05:24:08Z

PR_Github #42058 [ run ] completed with state FAILURE. Commit: 09d79e5
/LLM/main/L0_MergeRequest_PR pipeline #32898 (Partly Tested) completed with status: 'FAILURE'

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chenfeiz0326 · 2026-04-07T05:41:57Z

/bot run --disable-fail-fast --stage-list "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-5,GB200-24_GPUs-6_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE4-GPU16-Post-Merge-1,GB200-20_GPUs-5_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE4-GPU16-Post-Merge-2,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-4,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-5,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-8,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-9,GB200-40_GPUs-10_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE8-GPU32-Post-Merge-1"

tensorrt-cicd · 2026-04-07T05:48:54Z

PR_Github #42072 [ run ] triggered by Bot. Commit: 09d79e5 Link to invocation

tensorrt-cicd · 2026-04-07T07:02:43Z

PR_Github #42072 [ run ] completed with state FAILURE. Commit: 09d79e5
/LLM/main/L0_MergeRequest_PR pipeline #32912 (Partly Tested) completed with status: 'FAILURE'

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chenfeiz0326 · 2026-04-07T07:22:06Z

/bot run --disable-fail-fast --stage-list "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-5,GB200-24_GPUs-6_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE4-GPU16-Post-Merge-1,GB200-20_GPUs-5_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE4-GPU16-Post-Merge-2,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-4,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-5,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-8,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-9,GB200-40_GPUs-10_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE8-GPU32-Post-Merge-1"

tensorrt-cicd · 2026-04-07T07:28:09Z

PR_Github #42090 [ run ] triggered by Bot. Commit: 09d79e5 Link to invocation

tensorrt-cicd · 2026-04-07T07:39:37Z

PR_Github #42090 [ run ] completed with state FAILURE. Commit: 09d79e5
/LLM/main/L0_MergeRequest_PR pipeline #32929 (Partly Tested) completed with status: 'FAILURE'

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chenfeiz0326 · 2026-04-07T09:33:22Z

/bot run --disable-fail-fast --stage-list "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-5,GB200-24_GPUs-6_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE4-GPU16-Post-Merge-1,GB200-20_GPUs-5_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE4-GPU16-Post-Merge-2,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-4,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-5,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-8,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-9,GB200-40_GPUs-10_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE8-GPU32-Post-Merge-1"

tensorrt-cicd · 2026-04-07T09:39:06Z

PR_Github #42120 [ run ] triggered by Bot. Commit: 09d79e5 Link to invocation

tensorrt-cicd · 2026-04-07T10:52:07Z

PR_Github #42120 [ run ] completed with state FAILURE. Commit: 09d79e5
/LLM/main/L0_MergeRequest_PR pipeline #32957 (Partly Tested) completed with status: 'FAILURE'

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chenfeiz0326 · 2026-04-08T02:31:33Z

/bot run --disable-fail-fast --stage-list "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-5,GB200-24_GPUs-6_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE4-GPU16-Post-Merge-1,GB200-20_GPUs-5_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE4-GPU16-Post-Merge-2,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-4,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-5,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-8,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-9,GB200-40_GPUs-10_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE8-GPU32-Post-Merge-1"

tensorrt-cicd · 2026-04-08T02:38:07Z

PR_Github #42236 [ run ] triggered by Bot. Commit: 09d79e5 Link to invocation

tensorrt-cicd · 2026-04-08T03:37:48Z

PR_Github #42236 [ run ] completed with state FAILURE. Commit: 09d79e5
/LLM/main/L0_MergeRequest_PR pipeline #33047 (Partly Tested) completed with status: 'FAILURE'

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Signed-off-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-vscode-01.cm.cluster>

chenfeiz0326 · 2026-04-08T06:45:47Z

/bot run --disable-fail-fast --stage-list "GB200-12_GPUs-3_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE2-GPU8-Post-Merge-5,GB200-24_GPUs-6_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE4-GPU16-Post-Merge-1,GB200-20_GPUs-5_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE4-GPU16-Post-Merge-2,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-4,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-5,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-8,GB200-36_GPUs-9_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE8-GPU32-Post-Merge-9,GB200-40_GPUs-10_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE2-GPU8-GEN1-NODE8-GPU32-Post-Merge-1"

tensorrt-cicd · 2026-04-08T06:51:33Z

PR_Github #42290 [ run ] triggered by Bot. Commit: b74a388 Link to invocation

tensorrt-cicd · 2026-04-08T12:43:02Z

PR_Github #42290 [ run ] completed with state SUCCESS. Commit: b74a388
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chenfeiz0326 · 2026-04-09T05:05:54Z

/bot skip --comment "Only add new perf tests, no need to run the whole CI pipeline"

tensorrt-cicd · 2026-04-09T05:11:50Z

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PR_Github #42468 [ skip ] completed with state SUCCESS. Commit: 5caac1b
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chenfeiz0326 requested a review from a team April 2, 2026 10:36

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update

b74a388

Signed-off-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-vscode-01.cm.cluster>

chenfeiz0326 force-pushed the chenfeiz/add-dsv32-disagg-perf-tests branch from 09d79e5 to b74a388 Compare April 8, 2026 06:44

update

5caac1b

Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>

chenfeiz0326 changed the title ~~[None][infra] Add DSV32 Disagg Perf Tests Back~~ [None][infra] Add DSR1 DSV32 K2 Disagg Perf Tests Back Apr 9, 2026

chenfeiz0326 enabled auto-merge (squash) April 9, 2026 05:06

chenfeiz0326 merged commit 99563e4 into NVIDIA:main Apr 9, 2026
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Summary by CodeRabbit

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edited by coderabbitai Bot

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coderabbitai Bot commented Apr 2, 2026 •

edited

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