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[None][test] Add DSR1 B200 DISAGG to CI Perf Test#13882

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chenfeiz0326 merged 4 commits into
NVIDIA:mainfrom
chenfeiz0326:chenfeiz/add-b200-to-ci
May 18, 2026
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[None][test] Add DSR1 B200 DISAGG to CI Perf Test#13882
chenfeiz0326 merged 4 commits into
NVIDIA:mainfrom
chenfeiz0326:chenfeiz/add-b200-to-ci

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@chenfeiz0326 chenfeiz0326 commented May 8, 2026

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Summary by CodeRabbit

  • Tests
    • Expanded test coverage for B200 disaggregated multi-node configurations with additional SLURM-dispatched test stage definitions.

Description

Test Coverage

PR Checklist

Please review the following before submitting your PR:

  • PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.

  • PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.

  • Test cases are provided for new code paths (see test instructions)

  • Any new dependencies have been scanned for license and vulnerabilities

  • CODEOWNERS updated if ownership changes

  • Documentation updated as needed

  • Update tava architecture diagram if there is a significant design change in PR.

  • The reviewers assigned automatically/manually are appropriate for the PR.

  • Please check this after reviewing the above items as appropriate for this PR.

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chenfeiz0326 requested a review from a team May 8, 2026 04:02
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chenfeiz0326 requested a review from a team as a code owner May 8, 2026 04:02
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chenfeiz0326 requested review from niukuo and zeroepoch May 8, 2026 04:02
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/bot run --stage-list "DGX_B200-16_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE1-GPU8-Post-Merge*"

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Review Change Stack
No actionable comments were generated in the recent review. 🎉

ℹ️ Recent review info
⚙️ Run configuration

Configuration used: Path: .coderabbit.yaml

Review profile: CHILL

Plan: Enterprise

Run ID: c072744c-63c2-4cbb-9e7f-abbf8c895a61

📥 Commits

Reviewing files that changed from the base of the PR and between f8c90f2 and a0d155d.

📒 Files selected for processing (1)
  • jenkins/L0_Test.groovy

📝 Walkthrough

Walkthrough

This PR adds a new B200 disaggregated multi-node test stage to the Jenkins pipeline configuration. A single stage entry is appended to x86SlurmTestConfigs that configures a 2-node performance sanity test on DGX B200 hardware with PyTorch, using a specific test list and shard parameters.

Changes

B200 Multi-Node Test Configuration

Layer / File(s) Summary
SLURM Test Stage Config
jenkins/L0_Test.groovy
Adds x86SlurmTestConfigs entry for DGX_B200-16_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity with platform auto:dgx-b200-flex, test list l0_b200_multi_nodes_perf_sanity_ctx1_node1_gpu4_gen1_node1_gpu8, and parameters (shards: 6, count: 16, nodes: 2).

Estimated code review effort

🎯 1 (Trivial) | ⏱️ ~5 minutes

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name Status Explanation Resolution
Description check ⚠️ Warning The PR description is incomplete—it contains only the template with no actual details about the change, test coverage, or rationale filled in. Fill in the Description section explaining what was added and why, add Test Coverage details for the new test stage, and complete any relevant PR checklist items.
✅ Passed checks (4 passed)
Check name Status Explanation
Title check ✅ Passed The title clearly summarizes the main change: adding DSR1 B200 DISAGG configuration to CI performance tests, directly aligned with the changeset.
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.

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PR_Github #47309 [ run ] triggered by Bot. Commit: a0d155d Link to invocation

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PR_Github #47309 [ run ] completed with state SUCCESS. Commit: a0d155d
/LLM/main/L0_MergeRequest_PR pipeline #37250 (Partly Tested) completed with status: 'FAILURE'

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⚠️ Action Required:

  • Please check the failed tests and fix your PR
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chenfeiz0326 force-pushed the chenfeiz/add-b200-to-ci branch from a0d155d to 885ba90 Compare May 11, 2026 08:46
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/bot run --disable-fail-fast --stage-list "DGX_B200-16_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE1-GPU8-Post-Merge-1"

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PR_Github #47707 [ run ] triggered by Bot. Commit: 885ba90 Link to invocation

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/bot run --disable-fail-fast --stage-list "DGX_B200-16_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE1-GPU8-Post-Merge-1,DGX_B200-16_GPUs-2_Nodes-PyTorch-PerfSanity-Node2-GPU16-Post-Merge-1,DGX_B200-16_GPUs-2_Nodes-PyTorch-PerfSanity-Node2-GPU16-Post-Merge-2,DGX_B200-16_GPUs-2_Nodes-PyTorch-PerfSanity-Node2-GPU16-Post-Merge-3"

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PR_Github #47721 [ run ] triggered by Bot. Commit: 096f74f Link to invocation

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PR_Github #47721 [ run ] completed with state SUCCESS. Commit: 096f74f
/LLM/main/L0_MergeRequest_PR pipeline #37617 (Partly Tested) completed with status: 'FAILURE'

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⚠️ Action Required:

  • Please check the failed tests and fix your PR
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/bot run --disable-fail-fast --stage-list "DGX_B200-16_GPUs-2_Nodes-PyTorch-PerfSanity-Node2-GPU16-Post-Merge-*,DGX_B200-16_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE1-GPU8-Post-Merge-*"

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PR_Github #47985 [ run ] triggered by Bot. Commit: 096f74f Link to invocation

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PR_Github #47985 [ run ] completed with state SUCCESS. Commit: 096f74f
/LLM/main/L0_MergeRequest_PR pipeline #37825 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

  • Please check the failed tests and fix your PR
  • If you cannot view the failures, ask the CI triggerer to share details
  • Once fixed, request an NVIDIA team member to trigger CI again

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Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
@chenfeiz0326
chenfeiz0326 force-pushed the chenfeiz/add-b200-to-ci branch from 096f74f to ddb0df6 Compare May 15, 2026 09:05
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chenfeiz0326 requested a review from ZhanruiSunCh May 15, 2026 09:10
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
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/bot run --disable-fail-fast --stage-list "DGX_B200-16_GPUs-2_Nodes-PyTorch-Disagg-PerfSanity-CTX1-NODE1-GPU4-GEN1-NODE1-GPU8-Post-Merge-*"

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chenfeiz0326 enabled auto-merge (squash) May 15, 2026 09:14
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PR_Github #48573 [ run ] triggered by Bot. Commit: 8af03ff Link to invocation

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PR_Github #48573 [ run ] completed with state SUCCESS. Commit: 8af03ff
/LLM/main/L0_MergeRequest_PR pipeline #38360 (Partly Tested) completed with status: 'SUCCESS'

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/bot skip --comment "Only add new perf tests, no need to run the whole CI pipeline"

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PR_Github #48836 [ skip ] triggered by Bot. Commit: 8af03ff Link to invocation

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PR_Github #48836 [ skip ] completed with state SUCCESS. Commit: 8af03ff
Skipping testing for commit 8af03ff

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chenfeiz0326 merged commit f819383 into NVIDIA:main May 18, 2026
8 checks passed
KleinBlueC pushed a commit to KleinBlueC/TensorRT-LLM that referenced this pull request May 19, 2026
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com>
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