feat(rv32-promo)!: SYNTH_RV_LOCAL_PROMO default-on — measured local promotion ships (#472, #601, epic #242)

[avrabe]

SYNTH_RV_LOCAL_PROMO default-on — measured local promotion ships (#472, closes #601, epic #242)

Stacked on #626 (the measured-profitability model). The deliberate flip, executed with the refreeze ritual (PR #583 template). The RV32 local-promotion lever — leaf functions' non-parameter i32 locals into callee-saved s8/s9/s10 — now runs by default; SYNTH_RV_LOCAL_PROMO=0 is the opt-out (pre-flip bytes).

Evidence basis for the flip (all from #626, re-verified on this branch)

• Profitability is MEASURED per function: baseline + every candidate subset lowered, promoted lowering kept only at emitted_byte_size <= baseline — per-return epilogue restores and WAR-snapshot mvs (the feat(vcr-riscv)!: SYNTH_RV_CMP_SELECT default-on — the RV32 lever flip-wave; local-promotion flip HELD on a no-grow blocker (#472) #601 blocker) priced by construction; emitted_byte_size mirror-pinned to assemble_function (test(vcr-oracle): estimator↔encoder agreement oracle for the optimized path (#498, #242) #511).
• 10 functions shrink / 0 grow, function sets unchanged, across all 67 RV32-compiling repro fixtures (rv32_local_promo_no_grow_corpus_472, arms now default-vs-opt-out).

Execution differentials — run on the NEW DEFAULT bytes BEFORE any pin

All 11 scripts/repro/*riscv*_differential.py, env unset (i.e. the shipped default), fresh binary: 11/11 PASS (const_addr_fold −56 B, control_step + controller_step + filter_axis correct + ABI-compliant, i64_divs_317, if_else_result_343, rv32_cmp_select_472 182 vectors, rv32_local_promotion_472, shift_fold 21/21, signed_div_const, u64_unpack).

Refreeze table (frozen_fixtures_rv32_text_is_bit_identical_oracle_001)

fixture	old sha256 / len	new	Δ
control_step.wasm	6ac5d7f9… / 484	unchanged	0
signed_div_const.wasm	15fa429d… / 88	unchanged	0

No re-pin needed: the measured gate declines promotion everywhere in both pinned fixtures — promo-ON .text verified bit-identical by hash. ARM gates untouched (the lever is RV32-selector-only).

Per-function deltas at the new default (vs =0 opt-out)

fixture	function	opt-out	default	Δ
controller_step.wasm/.wat	controller_step_decide	332	308	−24
flight_seam.wasm/.wat	controller_step	416	412	−4
flight_seam_flat.wasm/.wat	controller_step	416	412	−4
flight_seam_flat.wasm/.wat	flight_algo	756	724	−32
rv32_cmp_select_472.wat	clamp	104	100	−4
rv32_local_promotion_472.wat	accum	264	196	−68

Opt-out pin (CI-gated escape hatch)

• New frozen_fixtures_rv32_local_promo_escape_hatch_is_noop: SYNTH_RV_LOCAL_PROMO=0 alone reproduces the pinned goldens (rollback proof + leak tripwire; the pins are promo-neutral so old bytes == current goldens).
• The shift-fold and cmp-select escape hatches now pin SYNTH_RV_LOCAL_PROMO=0 too — exact pre-flip composition, not a byte-neutrality bet (the documented COMPOSITION NOTE pattern).
• flag_flip_wave_242 + rv32_cmp_select_flip_472 pin promo =0 in both arms so each gate keeps isolating its own lever on the baseline it was frozen on.
• local_promotion_default_is_promoted_and_opt_out_frame_backed_472 (riscv unit test): env-unset default == flag-on lowering; opt-out stays frame-backed, no s8 write.

Gate (all green on this branch)

• 11/11 execution differentials on new default bytes BEFORE pinning ✓
• cargo test -p synth-backend-riscv (210) ✓ · cargo test -p synth-cli (frozen gates + all three escape hatches + flip gates) ✓
• cargo test --workspace — 104 suites, 0 failures ✓
• cargo fmt --check ✓ · chunked + full cargo clippy --workspace --all-targets -- -D warnings ✓

🤖 Generated with Claude Code

[avrabe]

Retargeted to main after #626 merged — CI should trigger now. Gate: merge on full green (frozen anchors + all execution oracles). — maintainer loop

[codecov]

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