Need Clarification on Op‑Amp Selection and Direct ADC Input Drive Requirements
In my circuit, I am using an OPA333 op‑amp to buffer a sensor signal before it goes through a two‑stage RC low‑pass filter (R13–C44 and R14–C45). My simulation shows the overall filter bandwidth is around 45 kHz.
The microcontroller I’m using is a Microchip SAM‑D5x/E5x device, which has a 12‑bit, 1‑MSPS SAR ADC. Since this type of ADC uses an internal sampling capacitor, the op‑amp must have enough bandwidth, slew rate, and output drive to charge that capacitor quickly and settle before each conversion.
The OPA333 datasheet states that it has:
• Gain‑bandwidth = 350 kHz
• Slew rate = 0.16 V/µs
• Output drive ≈ 5 mA
But for a 45 kHz, 3.3 V full‑scale sine wave, the required slew rate is:
SR_required = 2π × 45 kHz × 1.65 V ≈ 0.455 V/µs.
This required slew rate (0.455 V/µs) is almost 3× higher than what the OPA333 can provide (0.16 V/µs).
Also, the 350 kHz bandwidth seems too low to properly drive the ADC input and settle within the ADC’s 1‑MSPS sampling period.
Given this information, is the OPA333 actually fast enough to drive the SAM‑D5x/E5x ADC directly? Or should I replace it with a high‑speed ADC‑driver op‑amp (like OPA350 or OPA320) that has much higher bandwidth and slew rate?
And finally, for this microcontroller, should I place a small RC network (series resistor + small capacitor) between the op‑amp output and the ADC input to handle the ADC’s sampling capacitor and kick‑back noise. In the present schematic the opamp output is directly connected.
Circuit:
Simulation RC Filter:
2 answers
The following users marked this post as Works for me:
| User | Comment | Date |
|---|---|---|
| newbie | (no comment) | Mar 23, 2026 at 20:07 |
Your opening words appear to be at odds with your schematic but, assuming the schematic is correct I'm thinking why bother with an op-amp at all. According to sources on-line the input capacitance of the ADC is about 10 pF so, if that was directly fed from C44 in a slightly different arrangement it is likely to work with low errors.
Proposal:
So, if the 15 nF capacitor (C44) on the feed to the ADC were suddenly loaded with 10 pF (the ADC input), how much would the voltage dip. Well, assume the charge is the same before as after and, 2 volts was on the 15 nF capacitor (C44), adding 10 pF would reduce the voltage to 1.99867 volts.
Is that too much of an error (1.33 mV in 2 volts or 0.067%).
It might be a little too much but, on the other hand it may be very reasonable and, allows you to get rid of an op-amp. That op-amp (OP350) would erode accuracy by up to 500 μV (at 25° C) anyway due to its input offset error.
When you take into account the likely errors from your flux sensor, not using an op-amp is really the optimum route to choose.
Is an op-amp somehow needed? Well, in the data sheet this diagram is shown: -
Clearly there is no op-amp and, using CTRL-F there are zero mentions of op-amp, op amp or opamp.
You should also examine the effectiveness of the RC filter as an anti-alias filter. Do you know what ADC sampling rate you use?
In my circuit, I am using an OPA333 op amp to buffer a sensor signal before it goes through a two stage RC low pass filter (R13–C44 and R14–C45).
No, what you have is the flux sensor output feeding though a low-pass filter then being buffered by the op-amp prior to feeding into the ADC. In other words, your words are jumbled and imply that the filter comes between op-amp and ADC (which it doesn't according to your schematic).
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You are putting the cart before the horse. Everything should start with the characteristics of this "sensor signal". You need to know what bandwidth the sensor and whatever it is sensing can do, and what part of that you care about. What minimum step response or maximum frequency content is sufficient? What kind of noise is expected? What accuracy do you need? What resolution?
Just because the A/D can sample at 1 MHz doesn't mean the signal into the A/D needs to be that fast. If whatever you are measuring can't change full scale in 1 µs, then there is no point making the buffer and filter capable of it.
There are two ways to think about what you care about in a measured signal, the step response to some error limit, and the highest frequency of interest. Which is more relevant depends on what physical thing or property you are trying to measure. For example, if you are measuring sound for a human to eventually listen to, then you definitely don't care about frequencies above 20 kHz. If you only care about recording voice, then about 4 kHz is good enough. If you are measuring the level in a tank, the settling time of your signal is probably more relevant. You might say that settling to within 1 mm in 2 seconds is good enough, for example.
You can't design the amplifier, filter, and select an A/D without knowing the frequency content or settling time requirements.
Since this type of ADC uses an internal sampling capacitor, the op‑amp must have enough bandwidth, slew rate, and output drive to charge that capacitor quickly and settle before each conversion.
Slew rate and bandwidth should be driven by the signal requirements as described above, not the A/D needs.
The only A/D requirement that feeds backwards from the sample and hold details is the impedance of the signal presented to the A/D. The datasheet should tell you directly what the maximum signal impedance is that allows the A/D to live up to its specs. Often you can trade off max allowed impedance with sampling time. The longer the sampling time, the higher the signal impedance can be to still allow the holding cap to charge within the allowed error limit of the signal level. In most cases, an opamp with negative feedback around it, like the voltage follower you show, has sufficiently low impedance to drive most any A/D built into a microcontroller. However, I haven't looked at the datasheet for that micro, so it's your job to check.
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