6-Layer PCB Stackup

Choose six layers for a defined routing problem

A six-layer board is useful when the additional copper solves a named constraint: a congested escape region, a missing reference plane, a power distribution bottleneck, or separation between sensitive analog and switching circuits. Start by drawing those regions on the board outline. Count the routes that actually need a controlled reference rather than assuming that all six layers can carry signals. A plane reserved for a high-current rail is not simultaneously an unrestricted signal layer.

Compare two architectural candidates before assigning dielectric dimensions. Candidate A is signal, ground, signal, signal, ground, signal. It provides four nominal routing layers but the two middle signals can interact across their shared dielectric. Candidate B is signal, ground, power, signal, ground, signal. It provides a dedicated power layer and three signal layers. Neither is a production specification. Their usefulness depends on which gaps are thin, whether planes remain continuous, and how signals change references.

For a controller with connectors on both surfaces, identify the longest connector-to-device paths and their unavoidable transitions. For a sensor board, identify the switching-current loop and sensitive input path. The comparison should answer whether the extra internal routing layer prevents a long detour or merely creates more difficult transitions. If every channel needs two reference planes, compare an eight-layer architecture before forcing unsuitable nets into the central gap. More copper can reduce layout compromises, but it does not remove the need to document the return circuit.

A thickness calculation that does not hide the dielectric gaps

Consider an illustrative six-layer thickness budget with finished outer copper of 35 micrometres per side and inner copper of 18 micrometres on each of four layers. Copper contributes 142 micrometres. A 1.60 mm target therefore leaves 1.458 mm for dielectric if coatings are excluded from the target definition. This is arithmetic, not a recommendation for a specific laminate or press schedule.

If the two surface-to-plane gaps are each 0.12 mm, 1.218 mm remains for the three interior dielectric regions. Allocating that remainder equally would produce 0.406 mm per region, but there is no electrical reason to prefer equality. A thin power-to-ground region, a thicker middle separation, and another thin signal-to-reference gap may serve the circuit better. The fabricator must translate those requested regions into compatible available cores and bonding constructions.

Now compare a second concept with 0.18 mm outer gaps. The mechanical target is unchanged, yet the surface transmission-line geometry changes. Keeping the old trace width because both boards are called 1.6 mm six-layer boards would be a specification error. Record the layer-specific field-solver result with the accepted pressed thicknesses. Include finished conductor shape and solder-mask assumptions. An overall thickness measurement cannot establish that the internal dielectric allocation matches the model.

The downloadable schedule separates target, proposed and approved values. Blank approval cells deliberately remain blank until fabrication review; they are not automatically populated from the illustrative arithmetic.

Audit a transition as two connected paths

Follow a signal from its driver pad to the receiver and draw its nearby reference at every segment. When the signal moves from L1 to L6, the return must also move from the L2 reference environment to the L5 environment. A signal via by itself does not document that change. A nearby ground connection can help when both references are ground, while a change involving a power reference needs examination of the actual high-frequency return network.

Use the drill map to locate the ground connection, then check that its pads really connect to the intended planes rather than being isolated by clearances. Check connectors and mounting holes as well: a large keepout can interrupt the reference under a seemingly straight trace. A visually short route can have a poor return environment, and a longer route over uninterrupted ground can behave more predictably.

Do not approve the design from a universal maximum separation between signal and return vias. The via geometry, reference planes, signal spectrum and permitted discontinuity all matter. Use the device guidance as the first constraint, a suitable field model where required, and a representative coupon when uncertainty is material. The TI layout reference supports treating signal and return together; the decisions here are a proposed review workflow, not measured performance of this example board.

For each critical transition, capture the entering layer, leaving layer, reference pair, return connection and remaining unused barrel. This small table makes a stackup discussion much more actionable than a screenshot containing six colored stripes.

Release the stackup and routing rules as one revision

The final six-layer package should identify which dimensions are mechanical constraints and which are electrical targets. A connector may require finished board thickness within a particular range, while a controlled-impedance route needs an agreed local dielectric and conductor geometry. Distinguish those requirements so fabrication can propose a workable construction without silently changing the circuit assumptions.

Allow changes through a written comparison: original construction, proposed construction, affected net classes, updated geometry and required verification. A substitute resin system can preserve thickness while changing loss or thermal behavior. A different prepreg can preserve material family while changing pressed spacing. Neither substitution should be approved solely because the nominal layer count remains six.

Use the thickness worksheet and specialist planner output as a discussion attachment. The planning model cannot approve resin flow, copper balance, registration or electrical performance. For quotation, attach the board outline, quantities, material schedule, via spans and required records. For a repeat order, identify the approved revision rather than relying on an old email containing a preliminary table.

A useful supplier question is specific: can this reference allocation be built with available compatible materials while keeping the proposed impedance widths within the layout clearances? That question allows a constructive alternative. Asking only for the cheapest six-layer stackup leaves the engineering tradeoffs invisible. The linked fabrication page owns manufacture and quotation; this page owns the layer-allocation decision.